Page 1 Third Edition June 2006 Copyright Ó 2006 by HOLTEK SEMICONDUCTOR INC. All rights reserved. Printed in Taiwan. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form by any means, electronic, mechanical photo-...
Page 2: Table Of Contents
Contents Contents Part I Microcontroller Profile ..............1 Chapter 1 Hardware Structure ..................3 Introduction ........................3 Features ......................... 4 Technology Features ....................4 Kernel Features ....................... 4 Peripheral Features ....................5 Selection Table ......................5 Block Diagram ....................... 6 Pin Assignment ......................
Page 3 I/O Type MCU Special Function Registers ..................31 Indirect Addressing Registers - IAR, IAR0, IAR1 ..........31 Memory Pointers - MP, MP0, MP1 ................ 31 Bank Pointer - BP ....................32 Accumulator - ACC....................33 Program Counter Low Register - PCL ................. 33 Look-up Table Registers - TBLP, TBHP, TBLH .............
Page 4 Contents UART Receiver ..................... 78 Managing Receiver Errors ..................80 UART Interrupt Scheme ..................81 Address Detect Mode .................... 82 UART Operation in Power Down Mode ..............82 UART Sample Program ..................83 Oscillator ........................83 System Clock Configurations ................83 System Crystal/Ceramic Oscillator ................
Page 5 Step 1 - Create a New Project ................141 Step 2 - Add Source Program Files to the Project ..........141 Step 3 - Build the Project ................... 141 Step 4 - Programming the OTP Device ............. 141 Step 5 - Transmit Code to Holtek ..............142...
Page 6 Contents Appendix ....................143 Appendix A Device Characteristic Graphics .............. 145 Appendix B Package Information ................155...
Page 7 I/O Type MCU...
Page 8 By compiling all relevant data together in one handbook, we hope users of the Holtek range of I/O Type microcontroller devices will have at their fingertips a useful, complete and simple means to ef- ficiently implement their microcontroller applications.
Page 9 I/O Type MCU viii...
Page 10: Part I Microcontroller Profile
Part I Microcontroller Profile P a r t I Microcontroller Profile...
Page 11 I/O Type MCU...
Page 12: Chapter 1 Hardware Structure
The HT48R10A-1, HT48R30A-1, HT48R50A-1, HT48R70A-1 and HT48RU80 are OTP devices of- fering the advantages of easy and effective program updates, using the Holtek range of develop- ment and programming tools. These devices provide the designer with the means for fast and low cost product development cycles.
Page 13: Features
· Temperature Range: Operating Temperature -40°C to 85°C (Industrial Grade) Storage Temperature -50°C to 125°C Kernel Features · Program Memory: 1K´14 OTP/Mask ROM (HT48R10A-1/HT48C10-1) 2K´14 OTP/Mask ROM (HT48R30A-1/HT48C30-1) 4K´15 OTP/Mask ROM (HT48R50A-1/HT48C50-1) 8K´16 OTP/Mask ROM (HT48R70A-1/HT48C70-1) 16K´16 OTP/Mask ROM (HT48RU80/HT48CU80) ·...
Page 14: Peripheral Features
UART functions. To assist users in their selection of the most appropriate device for their appli- cation, the following table, which summarizes the main features of each device, is provided. Program Data Package Part No. Timer Interrupt UART Stack Memory Memory Types HT48R10A-1 2.2V~ ¾ 24SKDIP/SOP 1K´14 64´8 8-bit´1 HT48C10-1 5.5V HT48R30A-1 2.2V~ 24SKDIP/SOP, ¾...
Page 15: Block Diagram
I/O Type MCU Block Diagram The following block diagram illustrates the main functional blocks of the I/O Type microcontroller series of devices. Note 1. This block diagram represents the OTP device, for the mask device there is no Device Programming Circuitry. 2.
Page 16: Pin Assignment
Chapter 1 Hardware Structure Pin Assignment H T 4 8 R 1 0 A - 1 / H T 4 8 C 1 0 - 1 H T 4 8 R 3 0 A - 1 / H T 4 8 C 3 0 - 1 H T 4 8 R 3 0 A - 1 / H T 4 8 C 3 0 - 1 H T 4 8 R 5 0 A - 1 / H T 4 8 C 5 0 - 1 2 4 S K D I P - A / S O P - A...
Page 17: Pin Description
2 0 2 1 2 2 2 3 2 4 Note The pin compatibility features of the microcontroller packages allow for straightforward upgrading to devices of higher functionality with minimal changes to application hardware. Pin Description HT48R10A-1/HT48C10-1 Configuration Pin Name I/O Description Option Bidirectional 8-bit input/output port.
Page 18 Chapter 1 Hardware Structure Configuration Pin Name I/O Description Option OSC1, OSC2 are connected to an external RC network or external Crystal (determined by configuration option) for the internal system clock. For external RC system clock op- eration, OSC2 is an output pin for 1/4 system clock. Pull-high These two pins can also be optioned as an RTC oscillator OSC1/PC3...
Page 19 I/O Type MCU Configuration Pin Name Description Option Bidirectional 1-bit input/output port. Software instructions determine if the pin is a CMOS output or Schmitt Trigger in- put. A configuration option determines if the pin has a PG0/INT Pull-high pull-high resistor. PG0 is pin-shared with external interrupt pin INT.
Page 20 Chapter 1 Hardware Structure Configuration Pin Name Description Option Bidirectional 8-bit input/output port. Software instructions PB0/BZ determine if the pin is a CMOS output or Schmitt Trigger Pull-high PB1/BZ input. A configuration option determines if all pins on this I/O or BZ/BZ PB2~PB7 port have pull-high resistors.
Page 21 I/O Type MCU HT48R70A-1/HT48C70-1 Configuration Pin Name I/O Description Option Bidirectional 8-bit input/output port. Each pin can be config- ured as a wake-up input by configuration option. Software Pull-high instructions determine if the pin is a CMOS output or input. PA0~PA7 Wake-up Configuration options determine if all pins on this port have...
Page 22 Chapter 1 Hardware Structure HT48RU80/HT48CU80 Configuration Pin Name I/O Description Option Bidirectional 8-bit input/output port. Each pin can be config- ured as a wake-up input by configuration option. Software in- Pull-high structions determine if the pin is a CMOS output or input. PA0~PA7 Wake-up Configuration options determine if all pins on this port have...
Page 23: Absolute Maximum Ratings
I/O Type MCU Absolute Maximum Ratings -0.3V to V Supply Voltage.....................V +6.0V -0.3V to V Input Voltage ....................V +0.3V Storage Temperature.....................-50°C to 125°C Operating Temperature....................-40°C to 85°C These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may cause substantial damage to the device.
Page 24: Characteristics
Chapter 1 Hardware Structure A.C. Characteristics Ta=25°C Test Conditions Symbol Parameter Min. Typ. Max. Unit Conditions ¾ ¾ 2.2V~5.5V 4000 System Clock SYS1 (Crystal OSC) ¾ ¾ 3.3V~5.5V 8000 ¾ ¾ 2.2V~5.5V 4000 System Clock SYS2 (RC OSC) ¾ ¾ 3.3V~5.5V 8000 ¾...
Page 25: System Architecture
I/O Type MCU System Architecture A key factor in the high performance features of the range of I/O Type microcontrollers is attrib- uted to the internal system architecture. The range of devices take advantage of the usual fea- tures found within RISC microcontrollers providing increased speed of operation and enhanced performance.
Page 26: Program Counter
Chapter 1 Hardware Structure For instructions involving branches, such as jump or call instructions, two machine cycles are re- quired to complete instruction execution. An extra cycle is required as the program takes one cy- cle to first obtain the actual jump or call address and then another cycle to actually execute the branch.
Page 27 I/O Type MCU Note The lower byte of the Program Counter is fully accessible under program control. The use of the PCL might cause program branching, so an extra cycle is needed to pre-fetch. Further information on the PCL register can be found in the Special Function Register section. Except HT48RU80/HT48CU80 Program Counter Bits Mode...
Page 28: Stack
9. For the HT48R30A-1/HT48C30-1, since their Program Counter is 11 bits wide, the b11, b12 and b13 columns in the table are not applicable. 10. For the HT48R10A-1/HT48C10-1, since their Program Counter is 10 bits wide, the b10, b11, b12 and b13 columns in the table are not applicable.
Page 29: Arithmetic And Logic Unit - Alu
Precautions should be taken to avoid such cases which might cause unpredictable program branching. Note 1. For the HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1, N=4, i.e. 4 levels of stack available. 2. For the HT48R50A-1/HT48C50-1, N=6, i.e. 6 levels of stack available.
Page 30: Special Vectors
This vector is available for the HT48R50A-1/HT48C50-1, HT48R70A-1/ HT48C70-1 and HT48RU80/HT48CU80 only. The Timer/Event Counter is known as Timer/Event Counter 1. Note that the HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1 devices have only one timer, therefore, this interrupt vector is not used.
Page 31: Managing Multiple Banks
I/O Type MCU · Location 010H This vector is used by the external interrupt INT1. If the external interrupt pin on the device goes low, the program will jump to this location and begin execution if the external interrupt is enabled and the stack is not full.
Page 32 Chapter 1 Hardware Structure ; routine ²routb1² is located in Bank 1 mov a, BANK routb1 mov bp,a ; load bank number for routb1 into BP call routb1 ; call subroutine located in Bank 1 clr bp.5 ; program will return to this location ;...
Page 33: Look-Up Table
I/O Type MCU org 00Ch ; jump here from any bank when timer 1 int. ; occurs - BP retains original value ext_int: ; external interrupt subroutine mov bp_exti,a ; backup bank pointer mov a,status ; backup status register mov statusbuf0,a ;...
Page 34 The following example shows how the table pointer and table data is defined and retrieved from the HT48R10A-1/HT48C10-1 I/O microcontroller. This example uses raw table data located in the last page which is stored there using the ORG statement. The value at this ORG statement is ²300H²...
Page 35 I/O Type MCU For the HT48RU80/HT48CU80 devices, there are two Table Pointer Registers known as TBLP and TBHP in which the lower order and higher order address of the look-up data to be retrieved must be respectively first written. Unlike the other devices in which only the low address byte is de- fined using the TBLP register, the additional TBHP register allows the complete address of the look-up table to be defined and consequently allow table data from any address and any page to be directly accessed.
Page 36 5. For the HT48R50A-1/HT48C50-1, the Table address location is 12 bits, i.e. from b11~b0. 6. For the HT48R30A-1/HT48C30-1, the Table address location is 11 bits, i.e. from b10~b0. 7. For the HT48R10A-1/HT48C10-1, the Table address location is 10 bits, i.e. from b9~b0.
Page 37: Data Memory
Note with the exception of a few dedicated bits. The Data Memory can also be accessed through the Memory Pointer register MP for the HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1. For the other devices there are two Memory Pointer registers MP0 and MP1.
Page 38 Chapter 1 Hardware Structure HT48RU80/HT48CU80 devices, known as Bank 0, Bank 1 and Bank 2, it is necessary to first en- sure that the Bank Pointer is properly set to the correct value before accessing the General Pur- pose Data Memory. Bank 1 or Bank 2 must be addressed indirectly using the Memory Pointer MP1 and the indirect addressing register IAR1.
Page 39: Special Purpose Data Memory
I/O Type MCU Special Purpose Data Memory This area of Data Memory is where registers, necessary for the correct operation of the microcontroller, are stored. Most of the registers are both readable and writable but some are pro- tected and are readable only, the details of which are located under the relevant Special Function Register section.
Page 40: Special Function Registers
Any action on the Indirect Addressing Registers will result in corresponding read/write operations to the mem- ory location specified by the corresponding memory pointer. For the HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1 devices, one Indirect Addressing Register, IAR, and one Memory Pointer, MP, is provided.
Page 41: Bank Pointer - Bp
I/O Type MCU start: mov a,04h ; setup size of block mov block,a mov a,offset adres1 ; Accumulator loaded with first RAM address mov mp,a ; setup memory pointer with first RAM address loop: clr IAR ; clear the data at address defined by MP inc mp ;...
Page 42: Accumulator - Acc
Chapter 1 Hardware Structure Accumulator - ACC The Accumulator is central to the operation of any microcontroller and is closely related with opera- tions carried out by the ALU. The Accumulator is the place where all intermediate results from the ALU are stored.
Page 43: Status Register - Status
I/O Type MCU Status Register - STATUS This 8-bit register (0AH) contains the zero flag (Z), carry flag (C), auxiliary carry flag (AC), overflow flag (OV), power down flag (PDF), and watchdog time-out flag (TO). It also records the status infor- mation and controls the operation sequence.
Page 44: Interrupt Control Registers - Intc, Intc0, Intc1
Timer/Event Counter Registers Depending upon which device is selected, all devices contain one, two or three integrated Timer/Event Counters of either 8-bit or 16-bit size. For the HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1 devices, which have a single 8-bit Timer/Event Counter, an associated register known as TMR is the location where the timer¢s 8-bit value is located.
Page 45: Uart Registers - Usr, Ucr1, Ucr2, Txr/Rxr, Brg
Input/Output Ports Holtek microcontrollers offer considerable flexibility on their I/O ports. With the input or output des- ignation of every pin fully under user program control, pull-high options for all pins and wake-up op- tions on certain pins, the user is provided with an I/O structure to meet the needs of a wide range of application possibilities.
Page 46: I/O Port Control Registers
Chapter 1 Hardware Structure I/O Port Control Registers Each I/O line has its own control register (PAC, PBC, PCC, etc.,) to control the input/output configu- ration. With this control register, each CMOS output or Schmitt Trigger input with or without pull-high resistor structures can be reconfigured dynamically under software control.
Page 47 Oscillator The system oscillator pins OSC1 and OSC2 are pin-shared with PC3 and PC4 on the HT48R10A-1/HT48C10-1 and pins PG1 and PG2 on the HT48R30A-1/HT48C30-1 and HT48R50A-1/HT48C50-1. On the HT48R70A-1/HT48C70-1 and HT48RU80/HT48CU80, the os- cillator pins are not pin-shared. The pin-shared functions are selected via configuration option. If chosen to function as I/O pins, then full pull-high options remain.
Page 48 Chapter 1 Hardware Structure PB2~PB7, PC, PD, PE, PF and PG Input/Output Ports UART Pins The HT48RU80/HT48CU80 devices contain an internal Universal Asynchronous Receiver/Trans- mitter UART function, which requires two external pins for their serial connection to external de- vices. These pins known as TX and RX are pin-shared with I/O pins PC0 and PC1 respectively. PC0/TX Input/Output Port - HT48RU80/HT48CU80...
Page 49: Programming Considerations
I/O Type MCU PC1/RX Input/Output Port - HT48RU80/HT48CU80 Programming Considerations Within the user program, one of the first things to consider is port initialization. After a reset, all of the I/O data and port control registers will be set high. This means that all I/O pins will default to an input state, the level of which depends on the other connected circuitry and whether pull-high op- tions have been selected.
Page 50: Timer/Event Counters
All devices can have the timer clock configured to come from the internal clock source. In addition, the timer clock source can also be configured to come from an external timer pin. The accompanying table lists the associated timer register names. HT48R10A-1 HT48R30A-1 HT48R50A-1...
Page 51 I/O Type MCU ¸ 8-bit Timer/Event Counter Structure - HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1 ¸ 8-bit Timer/Event Counter 0 Structure - HT48R50A-1/HT48C50-1 ¸ 16-bit Timer/Event Counter 0 Structure - HT48R70A-1/HT48C70-1, HT48RU80/HT48CU80 ¸ 16-bit Timer/Event Counter 1 Structure - HT48R50A-1/HT48C50-1, HT48R70A-1/HT48C70-1, HT48RU80/HT48CU80...
Page 52: Timer Registers - Tmr, Tmr0, Tmr0L/Tmr0H, Tmr1L/Tmr1H, Tmr2
For the 8-bit timer, this register is known as TMR for the HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1 devices, TMR0 for the HT48R50A-1/HT48C50-1 devices and TMR2 for the HT48RU80/HT48CU80 devices. In the case of the 16-bit timer, a pair of 8-bit registers is required to store the16-bit timer value.
Page 53: Timer Control Registers - Tmrc, Tmr0C, Tmr1C, Tmr2C
I/O Type MCU Timer Control Registers - TMRC, TMR0C, TMR1C, TMR2C The flexible features of the Holtek microcontroller Timer/Event Counters enable them to operate in three different modes, the options of which are determined by the contents of their respective control register.
Page 54 Chapter 1 Hardware Structure T i m e r / E v e n t C o u n t e r C o n t r o l R e g i s t e r T M R 0 C H T 4 8 R 5 0 A - 1 / H T 4 8 C 5 0 - 1 T i m e r / E v e n t C o u n t e r C o n t r o l R e g i s t e r T M R 0 C...
Page 55 I/O Type MCU The HT48R50A-1/HT48C50-1 and HT48R70A-1/ HT48C70-1 devices have two internal timers, Timer/Event Counter 0 and Timer/Event Counter 1, and therefore require an additional timer con- trol register TMR1C. The HT48RU80/HT48CU80 devices have an additional 8-bit timer Timer/Event Counter 2 which requires an additional control register TMR2C. T i m e r / E v e n t C o u n t e r C o n t r o l R e g i s t e r T M R 1 C H T 4 8 R 5 0 A - 1 / H T 4 8 C 5 0 - 1...
Page 56: Configuring The Timer Mode
0 respectively. In this mode the internal clock is used as the timer clock. Note that for the 8-bit timers which are the single Timer/Event Counters in the HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1 devices, Timer/Event Counter 0 in the HT48R50A-1/HT48C50-1, and...
Page 57: Configuring The Pulse Width Measurement Mode
I/O Type MCU Event Counter Mode Timing Chart Configuring the Pulse Width Measurement Mode In this mode, the width of external pulses applied to the external timer pin can be measured. In the Pulse Width Measurement Mode the timer clock source is supplied by the internal clock. For the timer to operate in this mode, the bit pair, TM1/TM0, T0M1/T0M0, T1M1/T1M0 or T2M1/T2M0, de- pending upon which timer is used, must both be set high.
Page 58: Programmable Frequency Divider (Pfd) And Buzzer Application
Chapter 1 Hardware Structure Programmable Frequency Divider (PFD) and Buzzer Application Operating similar to a programmable frequency divider, the buzzer function within the microcontroller provides a means of producing a variable frequency output suitable for applica- tions such as piezo-buzzer driving or other interfaces requiring a precise frequency generator. The BZ and BZ are a complimentary pair and pin-shared with I/O pins, PB0 and PB1.
Page 59: Prescaler
I/O Type MCU Prescaler The single timer in the HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1, Timer/Event Counter 0 in the HT48R50A-1/HT48C50-1 as well as Timer/Event Counter 2 in the HT48RU80/ HT48CU80 all possess a prescaler. Bits 0~2 of their associated timer control register, namely bits PSC0~PSC2, T0PSC0~T0PSC2 or T2PSC0~T2PSC2, define the pre-scaling stages of the inter- nal clock source of the Timer/Event Counter.
Page 60 Chapter 1 Hardware Structure include ht48r50a-1.inc jmp begin org 04h ; external interrupt vector reti org 08h ; timer-counter 0 interrupt vector jmp tmr0int ; jump here when timer 0 overflows org 0ch ; timer-counter 1 interrupt vector jmp tmr1int ;...
Page 61: Interrupts
I/O Type MCU Interrupts The I/O series of microcontrollers each contains a range of both external and internal interrupt functions. The external interrupts are controlled by the action of one or two external pins, which are present on all devices. The internal interrupts are controlled by the Timer/Event Counters, and in the case of the HT48RU80/HT48CU80 devices by an additional UART function.
Page 62 Chapter 1 Hardware Structure I N T C R e g i s t e r H T 4 8 R 1 0 A - 1 / H T 4 8 C 1 0 - 1 H T 4 8 R 3 0 A - 1 / H T 4 8 C 3 0 - 1 I N T C R e g i s t e r H T 4 8 R 5 0 A - 1 / H T 4 8 C 5 0 - 1 H T 4 8 R 7 0 A - 1 / H T 4 8 C 7 0 - 1...
Page 63 I/O Type MCU I N T C 0 R e g i s t e r H T 4 8 R U 8 0 / H T 4 8 C U 8 0 I N T C 1 R e g i s t e r H T 4 8 R U 8 0 / H T 4 8 C U 8 0...
Page 64 Chapter 1 Hardware Structure The various interrupt enable bits, together with their associated request flags, are shown in the fol- lowing diagrams with their order of priority. Interrupt Scheme - HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1 Interrupt Scheme - HT48R50A-1/HT48C50-1 and HT48R70A-1/HT48C70-1 Interrupt Scheme - HT48RU80/HT48CU80...
Page 65: Interrupt Priority
EIF, EIF0 or EIF1 will be reset and the EMI bit will be cleared to disable other interrupts. For the HT48R10A-1/HT48C10-1, the external interrupt pin INT is pin-shared with PC0 and for the HT48R30A-1/HT48C30-1 and HT48R50A-1/HT48C50-1 devices, the external interrupt pin INT is...
Page 66: Timer/Event Counter Interrupt
Chapter 1 Hardware Structure pin-shared with PG0. For the HT48RU80/HT48CU80 devices, the external interrupt pin INT1 is pin-shared with PB2. Note that the external interrupt pins must be setup as inputs to enable cor- rect operation. Timer/Event Counter Interrupt For a timer generated internal interrupt to occur, the corresponding internal interrupt enable bit must be first set.
Page 67: Programming Considerations
I/O Type MCU USR register. Various bits in the UART¢s setup register, UCR2, determine if these flags can gener- ate a UART interrupt signal. More details on these two registers and how they influence the opera- tion of the UART interrupt can be found in the UART section of the handbook. Programming Considerations The interrupt request flags, TF, T0F, T1F, T2F, URF, EIF, EIF0 and EIF1, together with the interrupt enable bits ETI, ET0I, ET1I, ET2I, EURI, EEI, EEI0 and EEI1, form the interrupt control registers...
Page 68 Chapter 1 Hardware Structure memory address, a power-on reset also ensures that certain other registers are preset to known conditions. All the I/O port and port control registers will power-up in a high condition ensuring that all pins will be first set to inputs. Although the microcontroller has an internal RC reset function, due to unstable power-on condi- tions, an external RC network connected to the RES pin is generally recommended.
Page 69 I/O Type MCU Watchdog Time-out Reset during Normal Operation The Watchdog time-out Reset during normal operation is the same as RES reset except that the Watchdog time-out flag TO will be set to ²1². WDT Time-out Reset during Normal Operation Timing Chart Watchdog Time-out Reset during HALT The Watchdog time-out Reset during HALT is a little different from other kinds of reset.
Page 70 To ensure reliable continuation of normal program execution after a reset occurs, it is important to know what condition the microcontroller is in after a particular reset occurs. The following table de- scribes how each type of reset affects each of the microcontroller internal registers. HT48R10A-1/HT48C10-1 Reset RES or LVR...
Page 71 I/O Type MCU HT48R30A-1/HT48C30-1 Reset RES or LVR WDT Time-out WDT Time-out Register (Power-on) Reset (Normal Operation) (HALT) - x x x x x x x - u u u u u u u - u u u u u u u - u u u u u u u x x x x x x x x u u u u u u u u...
Page 72 Chapter 1 Hardware Structure HT48R50A-1/HT48C50-1 Reset RES or LVR WDT Time-out WDT Time-out Register (Power-on) Reset (Normal Operation) (HALT) x x x x x x x x u u u u u u u u u u u u u u u u u u u u u u u u x x x x x x x x u u u u u u u u...
Page 73 I/O Type MCU HT48R70A-1/HT48C70-1 Reset RES or LVR WDT Time-out WDT Time-out Register (Power-on) Reset (Normal Operation) (HALT) x x x x x x x x u u u u u u u u u u u u u u u u u u u u u u u u x x x x x x x x u u u u u u u u...
Page 74 Chapter 1 Hardware Structure HT48RU80/HT48CU80 Reset RES or LVR WDT Time-out WDT Time-out Register (Power-on) Reset (Normal Operation) (HALT) x x x x x x x x u u u u u u u u u u u u u u u u u u u u u u u u x x x x x x x x u u u u u u u u...
Page 75: Universal Asynchronous Receiver/Transmitter - Uart
I/O Type MCU Universal Asynchronous Receiver/Transmitter - UART This section applies only to the HT48RU80/HT48CU80 which are the only devices in the series that have an internal UART function. The HT48RU80/HT48CU80 devices contain an integrated full-duplex asynchronous serial communications UART interface that enables communication with external devices that contain a serial interface.
Page 76: Uart Data Transfer Scheme
Chapter 1 Hardware Structure UART Data Transfer Scheme The block diagram shows the overall data transfer structure arrangement for the UART. The actual data to be transmitted from the MCU is first transferred to the TXR register by the application pro- gram.
Page 77 I/O Type MCU USR Register The USR register is the status register for the UART, which can be read by the program to deter- mine the present status of the UART. All flags within the USR register are read only. U S R R e g i s t e r Further explanation on each of the flags is given below: ·...
Page 78 Chapter 1 Hardware Structure same clock cycle. The RXIF flag is cleared when the USR register is read with RXIF set, followed by a read from the RXR register, and if the RXR register has no data available. · RIDLE The RIDLE flag is the receiver status flag.
Page 79 I/O Type MCU UCR1 Register The UCR1 register together with the UCR2 register are the two UART control registers that are used to set the various options for the UART function, such as overall on/off control, parity control, data transfer bit length etc. U C R 1 R e g i s t e r Further explanation on each of the bits is given below: ·...
Page 80 Chapter 1 Hardware Structure · PREN This is parity enable bit. When this bit is equal to ²1² the parity function will be enabled, if the bit is equal to ²0² then the parity function will be disabled. · BNO This bit is used to select the data length format, which can have a choice of either 8-bits or 9-bits.
Page 81 I/O Type MCU Further explanation on each of the bits is given below: · TEIE This bit enables or disables the transmitter empty interrupt. If this bit is equal to ²1², when the transmitter empty TXIF flag is set, due to a transmitter empty condition, the UART interrupt re- quest flag will be set.
Page 82: Baud Rate Generator
Chapter 1 Hardware Structure by the UART. Clearing the TXEN bit during a transmission will cause the transmission to be aborted and will reset the transmitter. If this occurs, the TX pin can be used as a general purpose I/O pin. Baud Rate Generator To setup the speed of the serial data communication, the UART function contains its own dedi- cated baud rate generator.
Page 83 I/O Type MCU The following tables show actual values of baud rate and error values for the two values of BRGH. Baud Rates for BRGH = 0 Baud = 8MHz = 7.159MHz = 4MHz = 3.579545MHz Rate Kbps Kbaud Error Kbaud Error Kbaud Error Kbaud Error...
Page 84: Setting Up And Controlling The Uart
Chapter 1 Hardware Structure Setting Up and Controlling the UART Introduction For data transfer, the UART function utilizes a non-return-to-zero, more commonly known as NRZ, format. This is composed of one start bit, eight or nine data bits, and one or two stop bits. Parity is supported by the UART hardware, and can be setup to be even, odd or no parity.
Page 85: Uart Transmitter
I/O Type MCU Data, Parity and Stop Bit Selection The format of the data to be transferred, is composed of various factors such as data bit length, par- ity on/off, parity type, address bits and the number of stop bits. These factors are determined by the setup of various bits within the UCR1 register.
Page 86 Chapter 1 Hardware Structure result in an immediate transfer to the TSR. If during a transmission the TXEN bit is cleared, the transmission will immediately cease and the transmitter will be reset. The TX output pin will then re- turn to having a normal general purpose I/O pin function. Transmitting Data When the UART is transmitting data, the data is shifted on the TX pin from the shift register, with the least significant bit first.
Page 87: Uart Receiver
I/O Type MCU Transmit Break If the TXBRK bit is set then break characters will be sent on the next transmission. Break character transmission consists of a start bit, followed by 13 ´ N ¢0¢ bits and stop bits, where N=1, 2, etc. If a break character is to be transmitted then the TXBRK bit must be first set by the application pro- gram, then cleared to generate the stop bits.
Page 88 Chapter 1 Hardware Structure When a character is received the following sequence of events will occur: · The RXIF bit in the USR register will be set when RXR register has data available, at least one more character can be read. ·...
Page 89: Managing Receiver Errors
I/O Type MCU Managing Receiver Errors Several types of reception errors can occur within the UART module, the following section de- scribes the various types and how they are managed by the UART. Overrun Error - OERR Flag The RXR register is composed of a two byte deep FIFO data buffer, where two bytes can be held in the FIFO register, while a third byte can continue to be received.
Page 90: Uart Interrupt Scheme
Chapter 1 Hardware Structure UART Interrupt Scheme The UART internal function possesses its own internal interrupt and independent interrupt vector. Several individual UART conditions can generate an internal UART interrupt. These conditions are, a transmitter data register empty, transmitter idle, receiver data available, receiver overrun, address detect and an RX pin wake-up.
Page 91: Address Detect Mode
I/O Type MCU Address Detect Mode Setting the Address Detect Mode bit, ADDEN, in the UCR2 register, enables this special mode. If this bit is enabled then an additional qualifier will be placed on the generation of a Receiver Data Available Interrupt, which is requested by the RXIF flag.
Page 92: Uart Sample Program
Chapter 1 Hardware Structure UART Sample Program The following application program shows how the UART can be used for the transmission and re- ception of external data: t_uart_TX: clr intc0 ; disable intc0 clr intc1 ; disable intc1 a,80h mov ucr1,a ;...
Page 93: System Rc Oscillator
I/O Type MCU The table below shows the C1, C2 and R1 values for various crystal/ceramic oscillating frequencies. Crystal or Resonator C1, C2 4MHz Crystal 10kW 4MHz Resonator 10pF 12kW 3.58MHz Crystal 10kW 3.58MHz Resonator 25pF 10kW 2MHz Crystal and Resonator 25pF 10kW 1MHz Crystal...
Page 94: Rtc Oscillator
HALT state. However, to do this, another clock, independent of the system clock, must be pro- vided. To provide this feature, all of Holtek¢s I/O range of microcontrollers incorporate a Real Time Clock or RTC. This clock source has a fixed frequency of 32768Hz and requires a 32768Hz crystal to be connected between pins OSC1 and OSC2.
Page 95: Watchdog Timer Oscillator
Power Down Mode and Wake-up Power Down Mode All of the Holtek microcontrollers have the ability to enter a Power Down Mode, also known as the HALT Mode or Sleep Mode. When the device enters this mode, the normal operating current, will be reduced to an extremely low standby current level.
Page 96: Wake-Up
Chapter 1 Hardware Structure Wake-up After the system enters the Power Down Mode, it can be woken up from one of various sources listed as follows: · An external reset · An external falling edge on Port A · A system interrupt ·...
Page 97: Watchdog Timer
I/O Type MCU Watchdog Timer The Watchdog Timer is provided to prevent program malfunctions or sequences from jumping to unknown locations, due to certain uncontrollable external events such as electrical noise. It oper- ates by providing a ²chip reset² when the WDT counter overflows. The WDT clock is supplied by one of three sources selected by configuration option: its own self contained dedicated internal WDT oscillator, the instruction clock (system clock divided by 4) or the 32kHz RTC oscillator.
Page 98: Configuration Options
/4 or RTC oscillator or disable CLRWDT instructions: 1 or 2 instructions Timer/Event Counter clock source: f or RTC oscillator (HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1) Timer/Event Counter 0 clock source: f or RTC oscillator (HT48R50A-1/HT48C50-1 and HT48R70A-1/HT48C70-1) Timer/Event Counter 0 clock source: f...
Page 99: Application Circuits
I/O Type MCU Option LVR function: enable or disable External RC system clock/External Crystal System Clock/Internal RC system clock plus RTC clock/Internal RC system plus I/O (last option not applicable to HT48R70A-1/HT48C70-1 and HT48RU80/HT48CU80) Internal RC frequency selection 3.2MHz, 1.6MHz, 800kHz or 400kHz. Application Circuits The following application circuits although based around the HT48R50A-1 device equally apply to all devices in the I/O type range.
Page 100: Part Ii Programming Language
Part II Programming Language P a r t I I Programming Language...
Page 101 I/O Type MCU...
Page 102: Chapter 2 Instruction Set Introduction
In the case of Holtek microcontrollers, a comprehensive and flexible set of over 60 instructions is provided to en- able programmers to implement their application with the minimum of programming overheads.
Page 103: Moving And Transferring Data
The standard logical operations such as AND, OR, XOR and CPL all have their own instruction within the Holtek microcontroller instruction set. As with the case of most instructions involving data manipulation, data must pass through the Accumulator which may involve additional pro- gramming steps.
Page 104: Bit Operations
The ability to provide single bit operations on Data Memory is an extremely flexible feature of all Holtek microcontrollers. This feature is especially useful for output port bit programming where in- dividual bits or port pins can be directly set high or low using either the ²SET [m].i² or ²CLR [m].i² in- structions respectively.
Page 105 I/O Type MCU Mnemonic Description Cycles Flag Affected Logic Operation AND A,[m] Logical AND Data Memory to ACC OR A,[m] Logical OR Data Memory to ACC XOR A,[m] Logical XOR Data Memory to ACC Note ANDM A,[m] Logical AND ACC to Data Memory Note ORM A,[m] Logical OR ACC to Data Memory...
Page 106 Chapter 2 Instruction Set Introduction Mnemonic Description Cycles Flag Affected Branch JMP addr Jump unconditionally None Note SZ [m] Skip if Data Memory is zero None Note SZA [m] Skip if Data Memory is zero with data movement to ACC None Note SZ [m].i...
Page 107 I/O Type MCU...
Page 108: Chapter 3 Instruction Definition
Chapter 3 Instruction Definition C h a p t e r 3 Instruction Definition ADC A,[m] Add Data Memory to ACC with Carry Description The contents of the specified Data Memory, Accumulator and the carry flag are added. The result is stored in the Accumulator. ACC ¬...
Page 109 I/O Type MCU AND A,[m] Logical AND Data Memory to ACC Description Data in the Accumulator and the specified Data Memory perform a bitwise logical AND op- eration. The result is stored in the Accumulator. ACC ¬ ACC ²AND² [m] Operation Affected flag(s) AND A,x...
Page 110 Chapter 3 Instruction Definition CLR WDT Clear Watchdog Timer Description The TO, PDF flags and the WDT are all cleared. Operation WDT cleared TO ¬ 0 PDF ¬ 0 Affected flag(s) TO, PDF CLR WDT1 Pre-clear Watchdog Timer Description The TO, PDF flags and the WDT are all cleared. Note that this instruction works in conjunc- tion with CLR WDT2 and must be executed alternately with CLR WDT2 to have effect.
Page 111 I/O Type MCU DAA [m] Decimal-Adjust ACC for addition with result in Data Memory Description Convert the contents of the Accumulator value to a BCD ( Binary Coded Decimal) value re- sulting from the previous addition of two BCD variables. If the low nibble is greater than 9 or if AC flag is set, then a value of 6 will be added to the low nibble.
Page 112 Chapter 3 Instruction Definition INCA [m] Increment Data Memory with result in ACC Description Data in the specified Data Memory is incremented by 1. The result is stored in the Accumu- lator. The contents of the Data Memory remain unchanged. ACC ¬...
Page 113 I/O Type MCU OR A,x Logical OR immediate data to ACC Description Data in the Accumulator and the specified immediate data perform a bitwise logical OR op- eration. The result is stored in the Accumulator. ACC ¬ ACC ²OR² x Operation Affected flag(s) ORM A,[m]...
Page 114 Chapter 3 Instruction Definition RLA [m] Rotate Data Memory left with result in ACC Description The contents of the specified Data Memory are rotated left by 1 bit with bit 7 rotated into bit 0. The rotated result is stored in the Accumulator and the contents of the Data Memory re- main unchanged.
Page 115 I/O Type MCU RRC [m] Rotate Data Memory right through Carry Description The contents of the specified Data Memory and the carry flag are rotated right by 1 bit. Bit 0 replaces the Carry bit and the original carry flag is rotated into bit 7. [m].i ¬...
Page 116 Chapter 3 Instruction Definition SDZA [m] Skip if decrement Data Memory is zero with result in ACC Description The contents of the specified Data Memory are first decremented by 1. If the result is 0, the following instruction is skipped. The result is stored in the Accumulator but the specified Data Memory contents remain unchanged.
Page 117 I/O Type MCU SNZ [m].i Skip if bit i of Data Memory is not 0 Description If bit i of the specified Data Memory is not 0, the following instruction is skipped. As this re- quires the insertion of a dummy instruction while the next instruction is fetched, it is a two cycle instruction.
Page 118 Chapter 3 Instruction Definition SZ [m] Skip if Data Memory is 0 Description If the contents of the specified Data Memory is 0, the following instruction is skipped. As this requires the insertion of a dummy instruction while the next instruction is fetched, it is a two cycle instruction.
Page 119 I/O Type MCU XOR A,[m] Logical XOR Data Memory to ACC Description Data in the Accumulator and the specified Data Memory perform a bitwise logical XOR op- eration. The result is stored in the Accumulator. ACC ¬ ACC ²XOR² [m] Operation Affected flag(s) XORM A,[m]...
Page 120: Chapter 4 Assembly Language And Cross Assembler
Cross Assembler Assembly-Language programs are written as source files. They can be assembled into object files by the Holtek Cross Assembler. Object files are combined by the Cross Linker to generate a task file. A source program is made up of statements and look up tables, giving directions to the Cross As- sembler at assembly time or to the processor at run time.
Page 121: Statement Syntax
I/O Type MCU Example of Convention Description of Convention Three dots following an item signify that more items with the same form may be entered. For example, the directive PUB- LIC has the following form: Repeating elements... PUBLIC name1 [,name2 [,...]] In the above form, the three dots following name2 indicate that many names can be entered as long as each is pre- ceded by a comma.
Page 122: Comment
Chapter 4 Assembly Language and Cross Assembler Comment Comments are the descriptions of codes. They are used for documentation only and are ignored by the Cross Assembler. Any text following a semicolon is considered a comment. Assembly Directives Directives give direction to the Cross Assembler, specifying the manner in which the Cross Assem- bler generates object code at assembly time.
Page 123: File Control Directives
I/O Type MCU File Control Directives Syntax INCLUDE file-name INCLUDE ²file-name² · Description This directive inserts source codes from the source file given by file-name into the current source file during assembly. Cross Assembler supports at most 7 nesting levels. ·...
Page 124: Program Directives
Chapter 4 Assembly Language and Cross Assembler Syntax .LISTINCLUDE .NOLISTINCLUDE · Description The directive .LISTINCLUDE inserts the contents of all included files into the program listing. The directive .NOLISTINCLUDE suppresses the addition of included files. The default is .NOLISTINCLUDE. Syntax MESSAGE ¢text-string¢...
Page 125 I/O Type MCU For DATA sections, the byte address is in one byte units (8 bits/byte). BYTE aligns the section at any byte address, WORD aligns the section at any even address, PARA aligns the section at any address which is a multiple of 16, and PAGE aligns the section at any address which is a multiple of 256.
Page 126 Chapter 4 Assembly Language and Cross Assembler Syntax ORG expression · Description This directive sets the location counter to expression. The subsequent code and data offsets begin at the new offset specified by expression. The code or data offset is relative to the be- ginning of the section where the directive ORG is defined.
Page 127: Data Definition Directives
I/O Type MCU Syntax PROC name ENDP name · Description The PROC and ENDP directives mark a block of code which can be called or jumped to from other modules. The PROC creates a label name which stands for the address of the first instruction of a procedure.
Page 128 Chapter 4 Assembly Language and Cross Assembler Syntax [name] DB value1 [,value2 [, ...]] [name] DW value1 [,value2 [, ...]] [name] DBIT [name] DB repeated-count DUP(?) [name] DW repeated-count DUP(?) · Description These directives reserve the number of bytes/words specified by the repeated-count or reserve bytes/words only.
Page 129: Macro Directives
I/O Type MCU Macro Directives Macro directives enable a block of source statements to be named, and then that name to be re-used in the source file to represent the statements. During assembly, the Cross Assembler auto- matically replaces each occurrence of the macro name with the statements in the macro definition. A macro can be defined at any place in the source file as long as the definition precedes the first source line that calls this macro.
Page 130 Chapter 4 Assembly Language and Cross Assembler The following source program refers to the macro Delay: T . A S M S a m p l e p r o g r a m f o r M A C R O . .
Page 131: Assembly Instructions
I/O Type MCU Assembly Instructions The syntax of an instruction has the following form: [name:] mnemonic [operand1[,operand2]] [;comment] where ® label name name: ® instruction name (keywords) mnemonic ® registers operand1 memory address ® registers operand2 memory address immediate value Name A name is made up of letters, digits, and special characters, and is used as a label.
Page 132 Chapter 4 Assembly Language and Cross Assembler The values of these shift bit operators are all constant values. The expression is shifted right SHR or left SHL by the number of bits specified by count. If bits are shifted out of position, the corresponding bits that are shifted in are zero-filled.
Page 133: Miscellaneous
I/O Type MCU Example 2: mov A, BANK var mov BP,A mov A, OFFSET var mov MP1,A mov A,IAR1 · Operator precedence Precedence Operators 1 (Highest) ( ), [ ] +, - (unary), LOW, MID, HIGH, OFFSET, BANK *, /, %, SHL, SHR +, - (binary) >...
Page 134: Reserved Assembly Language Words
Chapter 4 Assembly Language and Cross Assembler Reserved Assembly Language Words The following tables list all reserved words used by the assembly language. · Reserved Names (directives, operators) INCLUDE LABEL OFFSET ELSE .LIST .LISTINCLUDE ENDIF .LISTMACRO PAGE ENDM LOCAL PARA ENDP PROC MACRO...
Page 135: Cross Assembler Options
I/O Type MCU Cross Assembler Options The Cross Assembler options can be set via the Options menu Project command in HT-IDE3000. The Cross Assembler Options is located on the center part of the Project Option dialog box. The symbols could be defined in the Define Symbol edit box. Syntax symbol1[=value1] [, symbol2[=value2] [, ...]] ·...
Page 136: Summary Of Assembly
Chapter 4 Assembly Language and Cross Assembler · Summary 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 .
Page 137 I/O Type MCU Example of assembly listing file F i l e : S A M P L E . A S M H o l t e k C r o s s - A s s e m b l e r V e r s i o n 2 .
Page 138: Part Iii Development Tools
Part III Development Tools P a r t I I I Development Tools...
Page 139 I/O Type MCU...
Page 140: Chapter 5 Mcu Programming Tools
To ease the process of application development, the importance and availability of supporting tools for microcontrollers cannot be underestimated. To support its range of MCUs, Holtek is fully committed to the development and release of easy to use and fully functional tools for its full range of devices.
Page 141: Holtek In-Circuit Emulator - Ht-Ice
Central to the system is the in-circuit hardware emulator, capable of emulating all of Holtek¢s 8-bit devices in real-time, while also providing a range of powerful debugging and trace fa- cilities. Regarding software functions, the system incorporates a user-friendly Windows based workbench which integrates together functions such as program editor, Cross Assembler, Cross Linker and library manager.
Page 142: Otp Programmer
The Holtek OTP programmers are supplied with a standard Textool chip socket. The OTP Adapter Card is used to connect the Holtek OTP programmers to the various sizes of available OTP chip packages that are unable to use this supplied socket.
Page 143: Ht-Ice Interface Card Settings
The J1 connector provides the I/O port connections as well as other pins. The DIP switch, SW1, should be set according to which device is selected and in accordance with the following table: Part No. Package Socket ¾ HT48R10A-1 24SKDIP/SOP ¾ HT48R30A-1 24/28SKDIP/SOP U2, U3 ¾...
Page 144: Installation
Exercise care when using the power adapter. Do not use a power adapter whose output voltage is not 16V, otherwise the HT-ICE may be damaged. It is strongly recommended that only the power adapter supplied by Holtek be used. First plug the power adapter to the power connector of the HT-ICE.
Page 145 I/O Type MCU Click <HT-IDE3000> button and the following dialog will be shown. Click <HT-IDE3000> or <Service Pack> as you want. Here¢s an Example of installing HT-IDE3000 Click <HT-IDE3000> button. · Step 2 Press the <Next> button to continue setup or press <Cancel> button to abort.
Page 146 Chapter 5 MCU Programming Tools · Step 3 The following dialog will be shown to ask the user to enter a directory name.
Page 147 I/O Type MCU · Step 4 Specify the path you want to install the HT-IDE3000 and click <Next> button. · Step 5 Setup will copy all files to the specified directory.
Page 148 (EXE), dynamic link libraries (DLL) and configuration files (CFG, FMT) for all supported MCU. The INCLUDE subdirectory contains all the include files (.H, .INC) provided by Holtek. The LIB subdirectory contains the library files (.LIB) provided by Holtek. The SAMPLE subdirectory con- tains some sample programs.
Page 149 I/O Type MCU...
Page 150: Chapter 6 Quick Start
Chapter 6 Quick Start C h a p t e r 6 Quick Start This chapter gives a brief description of using HT-IDE3000 to develop an application project. Step 1 - Create a New Project · Click on Project menu and select New command ·...
Page 151: Step 5 - Transmit Code To Holtek
Step 5 - Transmit Code to Holtek · Click on Project menu and select Print Option Table command · Send the .COD file and the Option Approval Sheet to Holtek The Programming and data flow is illustrated by the following diagram: .
Page 152 Appendix Appendix...
Page 153 I/O Type MCU...
Page 154 Appendix A Device Characteristic Graphics A p p e n d i x A Device Characteristic Graphics The following characteristic graphics depicts typical device behavior. The data presented here is a statistical summary of data gathered on units from different lots over a period of time. This is for in- formation only and the figures were not tested during manufacturing.
Page 155 I/O Type MCU Typical RC OSC vs. Temperature 1 . 0 2 5 1 . 0 2 = 3 V 1 . 0 1 5 1 . 0 1 = 5 V 1 . 0 0 5 0 . 9 9 5 = 5 V 0 .
Page 156 Appendix A Device Characteristic Graphics vs. V - 1 0 - 1 5 - 2 0 8 5 ° C 2 5 ° C - 2 5 0 ° C - 3 0 - 4 0 ° C - 3 5 - 4 0 1 .
Page 157 I/O Type MCU vs. V - 4 0 ° C 0 ° C 2 5 ° C 8 5 ° C 0 . 3 0 . 6 0 . 9 1 . 2 1 . 5 ( V o l t s ) vs.
Page 158 Appendix A Device Characteristic Graphics Typical R vs. V 1 2 0 1 1 0 1 0 0 8 5 ° C 2 5 ° C 0 ° C - 4 0 ° C 2 . 2 4 . 4 4 .
Page 159 I/O Type MCU Typical I vs. V Watchdog Enable - 4 0 ° C 0 ° C 2 5 ° C 8 5 ° C 5 . 8 2 . 2 2 . 4 2 . 6 2 . 8 3 .
Page 160 Appendix A Device Characteristic Graphics Typical Internal RC OSC vs. V - 4 0 ° C 5 . 5 0 ° C 4 . 5 2 5 ° C 3 . 5 8 5 ° C 2 . 2 2 . 4 2 .
Page 161 I/O Type MCU Typical I vs. Frequency (External Clock, Ta=0°C) 5 . 5 V 3 . 3 V 2 . 4 V 2 . 2 V 5 0 0 0 1 0 0 0 0 1 5 0 0 0 2 0 0 0 0 F R E Q U E N C Y ( k H z ) Typical I...
Page 162 Appendix A Device Characteristic Graphics Typical I vs. Frequency (External Clock, Ta=+85°C) 5 . 5 V 3 . 3 V 2 . 4 V 2 . 2 V 5 0 0 0 1 0 0 0 0 1 5 0 0 0 2 0 0 0 0 F R E Q U E N C Y ( k H z ) Typical V...
Page 163 I/O Type MCU...
Page 164 Appendix B Package Information A p p e n d i x B Package Information...
Page 165 I/O Type MCU 24-pin SKDIP (300mil) Outline Dimensions Dimensions in mil Symbol Min. Nom. Max. ¾ 1235 1265 ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 0° 15°...
Page 166 Appendix B Package Information 24-pin SOP (300mil) Outline Dimensions Dimensions in mil Symbol Min. Nom. Max. ¾ ¾ ¾ ¾ C¢ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 0° 10°...
Page 167 I/O Type MCU 28-pin SKDIP (300mil) Outline Dimensions Dimensions in mil Symbol Min. Nom. Max. ¾ 1375 1395 ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 0° 15°...
Page 168 Appendix B Package Information 28-pin SOP (300mil) Outline Dimensions Dimensions in mil Symbol Min. Nom. Max. ¾ ¾ ¾ ¾ C¢ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 0° 10°...
Page 169 I/O Type MCU 48-pin SSOP (300mil) Outline Dimensions Dimensions in mil Symbol Min. Nom. Max. ¾ ¾ ¾ ¾ C¢ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 0° 8°...
Page 170 Appendix B Package Information 64-pin QFP (14x20) Outline Dimensions Dimensions in mm Symbol Min. Nom. Max. ¾ 18.80 19.20 ¾ 13.90 14.10 ¾ 24.80 25.20 ¾ 19.90 20.10 ¾ ¾ ¾ ¾ 0.40 ¾ 2.50 3.10 ¾ ¾ 3.40 ¾ ¾...
Page 171 I/O Type MCU...
Page 172 Copyright Ó 2006 by HOLTEK SEMICONDUCTOR INC. The information appearing in this handbook is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for...
Page 173 I/O Type MCU...
Page 174 Amendments...

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Holtek HT48R10A-1 Handbook

Chapter 1 Hardware Structure

Chapter 2 Instruction Set Introduction

Chapter 3 Instruction Definition

Chapter 4 Assembly Language and Cross Assembler

Chapter 5 MCU Programming Tools

Chapter 6 Quick Start

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