32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
Clock Source Status Register – CKST
This register specifies status of clock source.
Offset:
0x034
Reset value: 0x0100_0003
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits
Field
[26:24]
HSIST
[17:16]
HSEST
[2:0]
CKSWST
Rev. 1.00
30
29
28
Reserved
22
21
20
Reserved
14
13
12
6
5
4
Reserved
Descriptions
Internal High Speed Clock Occupation Status (CK_HSI)
xx1: HSI is used by System Clock (CK_SYS) (SW = 0x3)
x1x: Reserved
1xx: HSI is used by Clock Monitor
External High Speed Clock Occupation Status (CK_HSE)
x1: HSE is used by System Clock (CK_SYS) (SW = 0x2)
1x: Reserved
Clock Switch Status
00x: Reserved
010: CK_HSE as system clock
011: CK_HSI as system clock
110: CK_LSE as system clock
111: CK_LSI as system clock
The fields are status to indicate which clock source is using as system clock currently.
89 of 486
27
26
HSIST
RO
0 RO
19
18
RO
11
10
Reserved
3
2
CKSWST
RO
0 RO
25
24
0 RO
1
17
16
HSEST
0 RO
0
9
8
1
0
1 RO
1
July 31, 2018
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