32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
Master Controller
The PWMs and TMs can be linked together internally for timer synchronization or chaining. When
one PWM is configured to be in the Master Mode, the PWM Master Controller will generate a
Master Trigger Output (MTO) signal which includes a reset, a start, a stop signal or a clock source
which is selected by the MMSEL field in the MDCFR register to trigger or drive another PWM or
TM, if exists, which is configured in the Slave Mode.
Figure 73. Master PWMn and Slave PWMm / TMm Connection
The Master Mode Selection bits, MMSEL, in the MDCFR register are used to select the MTO
source for synchronizing another slave PWM or TM if exists.
Figure 74. MTO Selection
For example, setting the MMSEL field to 0x5 is to select the CH1OREF signal as the MTO signal
to synchronize another slave PWM or TM. For a more detailed description, refer to the related
MMSEL field definitions in the MDCFR register.
Rev. 1.00
PWMn Master
MMSEL
MTO
TSE
UEVG bit
Counter enable signal
Update Event
CH0OREF
CH1OREF
CH2OREF
CH3OREF
255 of 486
PWMm/TMm Slave
SMSEL
ITI
TRSEL
MTO
MMSEL
July 31, 2018
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