Rtcout Output Pin Configuration; Table 40. Rtcout Output Mode And Active Level Setting - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
oscillators, the LDO and the CPU core if the corresponding wakeup enable bit CSECWEN is set.
When the RTC counter overflows or a compare match event occurs, it will generate an interrupt or
a wake up event determined by the corresponding interrupt or wakeup enable control bits, OVIEN
/ OVWEN or CMIEN / CMWEN bits, in the RTCIWEN register. Refer to the related register
definitions for more details.

RTCOUT Output Pin Configuration

The following table shows RTCOUT output format according to the mode, polarity and event
selection setting.

Table 40. RTCOUT Output Mode and Active Level Setting

ROWM ROES
0
Compare match
0
(Pulse mode)
1
Second clock
0
Compare match
1
(Level mode)
1
Second clock
T : RTCOUT output pulse time = 1 / f
R
→: Clear by software reading ROLF bit
Rev. 1.00
RTCOUT Output Waveform
RTCCMP
RTCCNT
RTCOUT (ROAP = 0)
RTCOUT (ROAP = 1)
ROLF
RTCCMP
RTCCNT
T
R
RTCOUT (ROAP = 0)
RTCOUT (ROAP = 1)
ROLF
RTCCMP
RTCCNT
RTCOUT (ROAP = 0)
RTCOUT (ROAP = 1)
ROLF
RTCCMP
RTCCNT
RTCOUT (ROAP = 0)
RTCOUT (ROAP = 1)
ROLF
CK_RTC
375 of 486
4
3 4
T
R
X
3 4
T T
R
4
3 4
→
X
3 4
→ →
5
5
R
5
5
July 31, 2018