Mass Erase; Figure 9. Mass Erase Operation Flowchart - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241

Mass Erase

The FMC provides a mass erase function which is used for resetting all the main Flash memory
content. The following steps show the register access sequence for mass erase operation.
▄
Check OPCR register to confirm that no Flash memory operation is in progress (OPM [3:0]
equals to 0xE or 0x6). Otherwise, wait until the previous operation has been finished.
▄
Write mass erase command to OCMR register (Set CMD [3:0] = 0xA).
▄
Commit mass erase command to FMC by setting OPCR register (Set OPM [3:0] = 0xA).
▄
Wait until all operations have been finished by checking the value of OPCR register (OPM [3:0]
equals to 0xE).
▄
Read and verify the Flash memory if required.
Since all Flash data will be reset as 0xFFFF_FFFF, the mass erase operation can be implemented
by the program that runs in the SRAM or by the debugging tool that accesses FMC registers
directly. The software function that is executed on the Flash memory shall not trigger a mass erase
operation. The following figure displays the mass erase operation flow.

Figure 9. Mass Erase Operation Flowchart

Rev. 1.00
Start
No
Is OPM equal to 0xE or 0x6 ?
Yes
Set OCMR = 0xA
Commit command
by setting OPCR
No
Is OPM equal to 0xE ?
Yes
Finish
39 of 486 July 31, 2018