Channel Break Control Register - Chbrkctr - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Bits Field
[1] CH0OISN
[0] CH0OIS
Channel Break Control Register – CHBRKCTR
This register specifies the channel break control bits.
Offset: 0x070
Reset value: 0x0000_0002
31
Type/Reset RW 0 RW
23
Reserved
Type/Reset
15
Type/Reset
7
Reserved
Type/Reset
Bits Field
[31:24] CHDTG
[21] CHOSSR
[20] CHOSSI
[18] GFSEL
Rev. 1.00
Descriptions
MT_CH0NO Output Idle State
0: Channel 0 complementary output CH1NO = 0 after a dead time when
CHMOE = 0
1: Channel 0 complementary output CH1NO = 1 after a dead time when
CHMOE = 0
MT_CH0O Output Idle State
0: Channel 0 output CH0O = 0 after a dead time when CHMOE = 0
1: Channel 0 output CH0O = 1 after a dead time when CHMOE = 0
30 29 28
0 RW 0 RW
22 21 20
CHOSSR CHOSSI
RW 0 RW
14 13 12
Reserved
6 5
CHAOE CHMOE
RW 0 RW
Descriptions
Channel Dead Time Duration Definition
CHDTG[7:5] = 0xx: Channel Dead Time = CHDTG [7:0] × t
CHDTG[7:5] = 10x: Channel Dead Time = (64 + CHDTG [5:0]) × t
with t
dtg
CHDTG[7:5] = 110: Channel Dead Time = (32 + CHDTG [4:0]) × t
with t
dtg
CHDTG[7:5] = 111: Channel Dead Time = (32 + CHDTG [4:0]) × t
with t
dtg
Channel Off State (CHxE, CHxNE = 0) Selection for Normal Run State (CHMOE = 1)
0: When inactive, MT_CHxO/MT_CHxNO output is disabled - not driven by timer
1: When inactive, MT_CHxO/MT_CHxNO output is enabled with their inactive
level
Channel Off State Selection for Idle Mode (CHMOE = 0)
0: When inactive, MT_CHxO/MT_CHxNO output is disable – not driven by timer
1: When inactive, MT_CHxO/MT_CHxNO output is enabled with their idle level
depending upon the condition of the the CHxOIS and CHxOISN bits
Deglitch Filter Selection for Break
0: No input deglitch filter
1: 50 ns deglitch filter
357 of 486
27 26
CHDTG
0 RW 0 RW
19 18
Reserved GFSEL
0 RW
11 10
RW 0 RW
4 3 2
Reserved
0
= 2 × t
DTS
= 8 × t
DTS
= 16 × t
DTS
25 24
0 RW 0 RW 0
17 16
LOCKLV
0 RW 0 RW 0
9 8
BKF
0 RW 0 RW 0
1 0
BKP BKE
RW 1 RW 0
, with t = t
dtg dtg DTS
,
dtg
,
dtg
,
dtg
July 31, 2018