Channel Control Register - Chctr - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Channel Control Register – CHCTR
This register contains the channel compare output function enable control bits.
Offset: 0x050
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Reserved
Type/Reset RW
Bits Field
[6] CH3E
[4] CH2E
[2] CH1E
[0] CH0E
Rev. 1.00
30 29 28
22 21 20
14 13 12
6 5 4
CH3E Reserved CH2E
0 RW
Descriptions
Channel 3 Compare Enable
0: Off – Channel 3 output signal CH3O is not active
1: On – Channel 3 output signal CH3O is generated on the corresponding output pin
Channel 2 Capture / Compare Enable
0: Off – Channel 2 output signal CH2O is not active
1: On – Channel 2 output signal CH2O is generated on the corresponding output pin
Channel 1 Capture / Compare Enable
0: Off – Channel 1 output signal CH1O is not active
1: On – Channel 1 output signal CH1O is generated on the corresponding output pin
Channel 0 Capture / Compare Enable
0: Off – Channel 0 output signal CH0O is not active
1: On – Channel 0 output signal CH0O is generated on the corresponding output pin
281 of 486
27 26
Reserved
19 18
Reserved
11 10
Reserved
3 2
Reserved CH1E
0 RW 0
25 24
17 16
9 8
1 0
Reserved CH0E
RW 0
July 31, 2018