Hse Clock Monitor; Clock Output Capability; Table 14. Ckout Clock Source - Holtek HT32F50231 User Manual

32-bit microcontroller with arm cortex-m0+
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32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
If any following action takes effect, the HSI is always under enable state.
Enable Clock monitor. (CKMEN)
Configure clock switch register bits to select the HSI. (SW)
Configure HSI enable register bit to 1. (HSIEN)
If any following action takes effect, the HSE is always under enable state.
Configure clock switch register bits to select the HSE. (SW)
Configure HSE enable register bit to 1. (HSEEN)
Programming guide of System clock selection is listed in following.
1. Enable any source clock which will become system clock.
2. Configuring the SW register bits to change system clock source will take effect after ready flag
of source clock is asserted. Note that system clock will force to HSI if clock monitor is enabled
and HSE clock configured as system clock is stuck at 0 or 1.

HSE Clock Monitor

The main function of the oscillator check is enabled by the HSE Clock Monitor Enable bit CKMEN
in the Global Clock Control Register, GCCR. The HSE clock monitor should be enabled after the
HSE oscillator start-up delay and be disabled when the HSE oscillator is stopped. Once the HSE
oscillator failure is detected, the HSE oscillator will automatically be disabled. The HSE clock
stuck flag CKSF in the Global Clock Interrupt Register GCIR will be set and an event of main
oscillator failure will be generated if the clock fail interrupt enable bit CKSIE in the GCIR is set.
This failure interrupt is connected to the exception vector of CPU Non-Maskable Interrupt, NMI. If
the HSE is directly used as the system clock, when the HSE oscillator failure occurs, the HSE will
be turned off and the system clock will be switched to the HSI automatically by the hardware.

Clock Output Capability

The device has the clock output capability to allow the clocks to be output on the specific external
output pin CKOUT. The configuration registers of the corresponding GPIO port must be well
configured in the Alternate Function I/O section, AFIO, to output the selected clock signal. There
are seven output clock signals to be selected via the device clock output source selection bits
CKOUTSRC in the Global Clock Configuration Register, GCFGR.

Table 14. CKOUT Clock Source

CKOUTSRC[2:0]
Rev. 1.00
000
CK_REF = CK_SYS / (CKREFPRE + 1) / 2
001
CK_AHB / 16
010
CK_SYS / 16
011
CK_HSE / 16
100
CK_HSI / 16
101
CK_LSE
110
CK_LSI
76 of 486
Clock Source
July 31, 2018

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