32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
Input Stage
The input stage consists of a digital filter, a channel polarity selection, edge detection and a channel
prescaler. The channel 0 input signal (TI0) can be chosen to come from the GT_CH0 signal or the
Excusive-OR function of the GT_CH0, GT_CH1 and GT_CH2 signals. The channel input signal
(TIx) is sampled by a digital filter to generate a filtered input signal TIxFP. Then the channel
polarity and the edge detection block can generate a TIxS0ED or TIxS1ED signal for the input
capture function. The effective input event number can be set by the channel capture input source
prescaler setting field (CHxPSC).
TI0SRC
GT_CH0
TI0XOR
GT_CH1
XOR
GT_CH2
TI0
TI0FP
Filter
f
sampling
TI0F
TI1
TI1FP
GT_CH1
Filter
f
sampling
TI1F
Figure 45. Channel 0 and Channel 1 Input Stages
Rev. 1.00
TRCED
f
CLKIN
Edge
Detection
Edge
Detection
f
CLKIN
TI0S0
TI0FN
CH0P
TI1S0
TI0S1
CH1P
TI1S1
TI1FN
197 of 486
CH0CCS
Edge
TI0S0ED
Detection
CH0PRESCALER
Edge
TI1S0ED
CH0PSC
Detection
Edge
TI0S1ED
Detection
CH1PRESCALER
Edge
TI1S1ED
Detection
CH1PSC
CH1CCS
TI0BED
CH0PSC
CH0CAP Event
CH1PSC
CH1CAP Event
July 31, 2018
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