Adc Interrupt Raw Status Register - Adciraw - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
ADC Interrupt Raw Status Register – ADCIRAW
This register contains the ADC interrupt raw status bits.
Offset: 0x084
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits Field
[24] ADIRAWO
[17] ADIRAWU
[16] ADIRAWL
[2] ADIRAWC
[1] ADIRAWG
[0] ADIRAWS
Rev. 1.00
30 29 28
Reserved
22 21 20
Reserved
14 13 12
6 5 4
Reserved
Descriptions
ADC Data Register Overwrite Interrupt Raw Status
0: ADC data register overwrite interrupt does not occur
1: ADC data register overwrite interrupt occurs
ADC Watchdog Upper Threshold Interrupt Raw Status
0: ADC watchdog upper threshold interrupt does not occur
1: ADC watchdog upper threshold interrupt occurs
ADC Watchdog Lower Threshold Interrupt Raw Status
0: ADC watchdog lower threshold interrupt does not occur
1: ADC watchdog lower threshold interrupt occurs
ADC Cycle EOC Interrupt Raw Status
0: ADC regular cycle end of conversion interrupt does not occur
1: ADC regular cycle end of conversion interrupt occurs
ADC Subgroup EOC Interrupt Raw Status
0: ADC regular subgroup end of conversion interrupt does not occur
1: ADC regular subgroup end of conversion interrupt occurs
ADC Single EOC Interrupt Raw Status
0: ADC regular single end of conversion interrupt does not occur
1: ADC regular single end of conversion interrupt occurs
182 of 486
27 26
19 18
ADIRAWU ADIRAWL
RO
11 10
Reserved
3 2
ADIRAWC ADIRAWG ADIRAWS
RO 0 RO
25 24
ADIRAWO
RO 0
17 16
0 RO 0
9 8
1 0
0 RO 0
July 31, 2018