Channel Polarity Configuration Register - Chpolr - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Channel Polarity Configuration Register – CHPOLR
This register contains the channel compare output polarity control.
Offset: 0x054
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Reserved
Type/Reset RW
Bits Field
[6] CH3P
[4] CH2P
[2] CH1P
[0] CH0P
Rev. 1.00
30 29 28
22 21 20
14 13 12
6 5 4
CH3P Reserved CH2P
0 RW
Descriptions
Channel 3 Compare Polarity
0: Channel 3 Output is active high
1: Channel 3 Output is active low
Channel 2 Compare Polarity
0: Channel 2 Output is active high
1: Channel 2 Output is active low
Channel 1 Compare Polarity
0: Channel 1 Output is active high
1: Channel 1 Output is active low
Channel 0 Compare Polarity
0: Channel 0 Output is active high
1: Channel 0 Output is active low
282 of 486
27 26
Reserved
19 18
Reserved
11 10
Reserved
3 2
Reserved CH1P
0 RW 0
25 24
17 16
9 8
1 0
Reserved CH0P
RW 0
July 31, 2018