Register Map; Register Descriptions; Bftm Control Register - Bftmcr; Table 33. Bftm Register Map - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241

Register Map

The following table shows the BFTM registers and their reset values.

Table 33. BFTM Register Map

Register
BFTMCR
BFTMSR
BFTMCNTR
BFTMCMPR

Register Descriptions

BFTM Control Register – BFTMCR
This register specifies the overall BFTM control bits.
Offset: 0x000
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits Field
[2] CEN
[1] OSM
[0] MIEN
Rev. 1.00
Offset
0x000 BFTM Control Register
0x004 BFTM Status Register
0x008 BFTM Counter Value Register
0x00C BFTM Compare Value Register
30 29 28
22 21 20
14 13 12
6 5 4
Reserved
Descriptions
BFTM Counter Enable Control
0: BFTM is disabled
1: BFTM is enabled
When this bit is set to 1, the BFTM counter will start to count. The counter will stop
counting and the counter value will remain unchanged when the CEN bit is cleared
to 0 by the application program regardless of whether it is in the repetitive or one
shot mode. However, in the one shot mode, the counter will stop counting and be
reset to 0 when the CEN bit is cleared to 0 by the timer hardware circuitry which
results from a compare match event.
BFTM One Shot Mode Selection
0: Counter operates in repetitive mode
1: Counter operates in one shot mode
BFTM Compare Match Interrupt Enable Control
0: Compare Match Interrupt is disabled
1: Compare Match Interrupt is enabled
295 of 486
Description
27 26
Reserved
19 18
Reserved
11 10
Reserved
3 2
CEN
RW 0 RW
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0xFFFF_FFFF
25 24
17 16
9 8
1 0
OSM MIEN
0 RW 0
July 31, 2018