Global Clock Interrupt Register - Gcir - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Global Clock Interrupt Register – GCIR
This register specifies interrupt enable and flag bits.
Offset: 0x00C
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits Field
[16] CKSIE
[0] CKSF
Rev. 1.00
30 29 28
22 21 20
14 13 12
6 5 4
Descriptions
Clock Stuck Interrupt Enable
0: Disable clock fail interrupt
1: Enable clock fail interrupt
Set and reset by software to enable / disable interrupt caused by clock monitor.
Clock Stuck Interrupt Flag
0: Clock works normally
1: HSE clock is stuck
Reset by software (Write 1 clear). Set by hardware when HSE clock stuck and
CKSIE is set.
82 of 486
27 26
Reserved
19 18
Reserved
11 10
Reserved
3 2
Reserved
25 24
17 16
CKSIE
RW 0
9 8
1 0
CKSF
WC 0
July 31, 2018