32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
Timer Interconnection
The timers can be internally connected together for timer chaining or synchronization. This can
be implemented by configuring one timer to operate in the Master mode while configuring another
timer to be in the Slave mode. The following figures present several examples of trigger selection
for the master and slave modes.
Using One Timer to Enable / Disable Another Timer Start or Stop Counting
▄
Configure GPTM as the master mode to send its channel 0 Output Reference signal CH0OREF
as a trigger output (MMSEL = 0x4).
▄
Configure GPTM CH0OREF waveform.
▄
Configure MCTM to receive its input trigger source from the GPTM trigger output (TRSEL = 0xA).
▄
Configure MCTM to operate in the pause mode (SMSEL = 0x5).
▄
Enable MCTM by writing '1' to the TME bit.
▄
Enable GPTM by writing '1' to the TME bit.
Master GPTM
f
CLKIN
GPTM
CH0OREF
GPTM
CNTR
Slave MCTM
MCTM
CNTR
MCTM
TEVIF
Figure 60. Pausing MCTM using the GPTM CH0OREF Signal
Rev. 1.00
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Software clearing
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July 31, 2018
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