Channel Controller; Output Stage; Figure 75. Compare Block Diagram; Figure 76. Output Stage Block Diagram - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241

Channel Controller

The PWM has four independent channels which can be used as compare match outputs. Each
compare match output channel is composed of a preload register and a shadow register. Data access
of the APB bus is always implemented by reading / writing preload register.
When used in the compare match output mode, the contents of the CHxCR preload register is copied
into the associated shadow register; the counter value is then compared with the register value.

Figure 75. Compare Block Diagram

Output Stage

The PWM has four channels for compare match, single pulse or PWM output function. The channel
output PWM_CHx is controlled by the CHxOM, CHxP and CHxE bits in the corresponding
CHxOCFR, CHPOLR and CHCTR registers.
CNTR
CHxCR
f
CLKIN

Figure 76. Output Stage Block Diagram

Rev. 1.00
APB Bus Interface
CHxCR
(Preload Register)
Compare Transfer
CHxCR
(Shadow Register)
CHxOREF
Output Mode
Controller
CHxOM
x: 0 ~ 3
256 of 486
Compare
Controller
CNTR CHxPRE
Output Enable
Controller
CHxP
CHxE
Write CHxCR
Update Event
PWM_CHx
CHxOREF
CHxCMP Event
July 31, 2018