Port B Output Set / Reset Control Register - Pbsrr - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Port B Output Set / Reset Control Register – PBSRR
This register is used to set or reset the corresponding bit of the GPIO Port B output data.
Offset: 0x024
Reset value: 0x0000_0000
31
Type/Reset WO 0 WO
23
Type/Reset WO 0 WO
15
Type/Reset WO 0 WO
7
Type/Reset WO 0 WO
Bits Field
[31:16] PBRSTn
[15:0] PBSETn
Rev. 1.00
30 29 28
0 WO 0 WO
22 21 20
0 WO 0 WO
14 13 12
0 WO 0 WO
6 5 4
0 WO 0 WO
Descriptions
GPIO Port B pin n Output Reset Control Bits (n = 0 ~ 15)
0: No effect on the PBDOUTn bit
1: Reset the PBDOUTn bit
Note that when the PBRSTn bit in this register or (and) the PBRSTn bit in the PBRR
register is enabled, the reset function on the PBDOUTn bit will take effect.
GPIO Port B pin n Output Set Control Bits (n = 0 ~ 15)
0: No effect on the PBDOUTn bit
1: Set the PBDOUTn bit
Note that the function enabled by the PBSETn bit has the higher priority if both the
PBSETn and PBRSTn bits are set at the same time.
127 of 486
27 26
PBRST
0 WO 0 WO 0 WO
19 18
PBRST
0 WO 0 WO 0 WO
11 10
PBSET
0 WO 0 WO 0 WO
3 2
PBSET
0 WO 0 WO 0 WO
25 24
0 WO 0
17 16
0 WO 0
9 8
0 WO 0
1 0
0 WO 0
July 31, 2018