32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
Counter Value
CRR
CHxCR
TME bit
Trigger by STI
STI
CHxOREF
delay
(PWM1)
delay
(PWM2)
CHxOREF
min. delay
(PWM1)
(PWM2)
min. delay
UEVIF
CHxCIF
Figure 83. Single Pulse Mode
Rev. 1.00
Counter
reinitialized
Cleared by
Trigger by S/W
Update Event
delay
delay
delay
delay
Flag is set by update event
and cleard by S/W
Flag is set by compare match
and cleared by S/W
261 of 486
Counter stopped
and held
Time
Cleared by S/W
CHxIMAE=0
CHxIMAE=1
July 31, 2018
Need help?
Do you have a question about the HT32F50231 and is the answer not in the manual?