HOLTEK HT32F52342 32-bit microcontroller Manuals

Manuals and User Guides for HOLTEK HT32F52342 32-bit microcontroller. We have 1 HOLTEK HT32F52342 32-bit microcontroller manual available for free PDF download: User Manual

HOLTEK HT32F52342 User Manual (656 pages)

32-Bit Microcontroller with Arm Cortex-M0+ Core

Brand: HOLTEK | Category: Microcontrollers | Size: 6 MB

Table of Contents
2
1 Introduction

26
- Overview
  26
- Features
  27
- Device Information
  32
- Table 1. Series Features and Peripheral List
  32
- Block Diagram
  33
- Figure 1. Block Diagram
  33
2 Document Conventions

34
- Table 2. Document Conventions
  34
3 System Architecture

35
- Arm ® Cortex ® -M0+ Processor
  35
- Bus Architecture
  36
- Figure 2. Cortex ® -M0+ Block Diagram
  36
- Memory Organization
  37
  - Figure 3. Bus Architecture
    37
  - Figure 4. Memory Map
    38
  - Memory Map
    38
  - Table 3. Register Map
    39
  - AHB Peripherals
    41
  - APB Peripherals
    41
  - Embedded Flash Memory
    41
  - Embedded SRAM Memory
    41
4 Flash Memory Controller (FMC)

42
5 Power Control Unit (PWRCU)

68
6 Clock Control Unit (CKCU)

82
7 Reset Control Unit (RSTCU)

119
- Introduction
  119
- Figure 18. RSTCU Block Diagram
  119
- Functional Descriptions
  120
  - Power on Reset
    120
  - System Reset
    120
  - AHB and APB Unit Reset
    120
  - Figure 19. Power on Reset Sequence
    120
- Register Map
  121
- Register Descriptions
  121
8 General Purpose I/O (GPIO)

127
9 Alternate Function Input/Output Control Unit (AFIO)

175
- Introduction
  175
- Figure 22. AFIO Block Diagram
  175
- Features
  176
- Functional Descriptions
  176
  - External Interrupt Pin Selection
    176
  - Figure 23. EXTI Channel Input Selection
    176
  - Alternate Function
    177
  - Lock Mechanism
    177
- Register Map
  177
- Table 22. AFIO Selection for Peripheral Map Example
  177
- Table 23. AFIO Register Map
  177
- Register Descriptions
  178
10 Nested Vectored Interrupt Controller (NVIC)

182
- Introduction
  182
- Table 24. Exception Types
  182
- Features
  183
- Function Descriptions
  184
  - Systick Calibration
    184
- Register Map
  184
- Table 25. NVIC Register Map
  184
11 External Interrupt/Event Controller (EXTI)

185
12 Analog to Digital Converter (ADC)

197
- Introduction
  197
- Figure 27. ADC Block Diagram
  197
- Features
  198
- Function Descriptions
  199
  - ADC Clock Setup
    199
  - Channel Selection
    199
  - Conversion Mode
    199
  - Figure 28. One Shot Conversion Mode
    200
  - Figure 29. Continuous Conversion Mode
    200
  - Start Conversion on External Event
    202
  - Figure 30. Discontinuous Conversion Mode
    202
  - Sampling Time Setting
    203
  - Data Format
    203
  - Analog Watchdog
    203
  - Table 27. Data Format in ADCDR [15:0]
    203
  - Interrupts
    204
  - PDMA Request
    204
- Register Map
  205
- Table 28. A/D Converter Register Map
  205
- Register Descriptions
  206
13 Comparator (CMP)

221
14 General-Purpose Timer (GPTM)

230
15 Basic Function Timer (BFTM)

304
- Introduction
  304
- Features
  304
- Figure 69. BFTM Block Diagram
  304
- Functional Description
  305
  - Repetitive Mode
    305
  - Figure 70. BFTM - Repetitive Mode
    305
  - One Shot Mode
    306
  - Figure 71. BFTM - One Shot Mode
    306
  - Figure 72. BFTM - One Shot Mode Counter Updating
    306
- Register Map
  307
- Register Descriptions
  307
  - BFTM Control Register - BFTMCR
    307
  - Table 34. BFTM Register Map
    307
  - BFTM Status Register - BFTMSR
    308
  - BFTM Counter Register - BFTMCNTR
    309
  - BFTM Compare Value Register - BFTMCMPR
    310
16 Motor Control Timer (MCTM)

311
17 Single-Channel Timer (SCTM)

398
- Introduction
  398
- Figure 116. SCTM Block Diagram
  398
- Features
  399
- Functional Descriptions
  399
  - Counter Mode
    399
  - Figure 117. Up-Counting Example
    399
  - Clock Controller
    400
  - Figure 118. SCTM Clock Selection Source
    400
  - Trigger Controller
    401
  - Figure 119. Trigger Controller Block
    401
  - Slave Controller
    402
  - Figure 120. Slave Controller Diagram
    402
  - Figure 121. SCTM in Restart Mode
    402
  - Figure 122. SCTM in Pause Mode
    403
  - Figure 123. SCTM in Trigger Mode
    403
  - Channel Controller
    404
  - Figure 124. Capture/Compare Block Diagram
    404
  - Figure 125. Input Capture Mode
    405
  - Input Stage
    406
  - Figure 126. Channel Input Stages
    406
  - Figure 127. TI Digital Filter Diagram with N = 2
    406
  - Output Stage
    407
  - Table 40. Compare Match Output Setup
    407
  - Figure 128. Output Stage Block Diagram
    407
  - Figure 129. Toggle Mode Channel Output Reference Signal (CHPRE = 0)
    408
  - Figure 130. Toggle Mode Channel Output Reference Signal (CHPRE = 1)
    408
  - Update Management
    409
  - Figure 131. PWM Mode Channel Output Reference Signal
    409
- Register Map
  410
- Table 41. SCTM Register Map
  410
- Figure 132. Update Event Setting Diagram
  410
- Register Descriptions
  411
18 Real Time Clock (RTC)

427
- Introduction
  427
- Features
  427
- Figure 133. RTC Block Diagram
  427
- Functional Descriptions
  428
- Register Map
  431
- Register Descriptions
  431
  - RTC Counter Register - RTCCNT
    431
  - Table 44. RTC Register Map
    431
  - RTC Compare Register - RTCCMP
    432
  - RTC Control Register - RTCCR
    433
  - RTC Status Register - RTCSR
    435
  - RTC Interrupt and Wakeup Enable Register - RTCIWEN
    436
19 Watchdog Timer (WDT)

437
- Introduction
  437
- Features
  437
- Figure 134. Watchdog Timer Block Diagram
  437
- Functional Description
  438
- Figure 135. Watchdog Timer Behavior
  439
- Register Map
  440
- Register Descriptions
  440
20 Inter-Integrated Circuit (I C)

446
- Introduction
  446
- Figure 136. I C Module Block Diagram
  446
- Features
  447
- Functional Descriptions
  447
  - Two Wire Serial Interface
    447
  - START and STOP Conditions
    447
  - Data Validity
    448
  - Figure 137. START and STOP Condition
    448
  - Figure 138. Data Validity
    448
  - Addressing Format
    449
  - Figure 139. 7-Bit Addressing Mode
    449
  - Figure 140. 10-Bit Addressing Write Transmit Mode
    450
  - Figure 141. 10-Bit Addressing Read Receive Mode
    450
  - Data Transfer and Acknowledge
    451
  - Figure 142. I C Bus Acknowledge
    451
  - Clock Synchronization
    452
  - Arbitration
    452
  - Figure 143. Clock Synchronization During Arbitration
    452
  - Figure 144. Two Master Arbitration Procedure
    452
  - General Call Addressing
    453
  - Bus Error
    453
  - Address Mask Enable
    453
  - Address Snoop
    453
  - Operation Mode
    453
  - Figure 145. Master Transmitter Timing Diagram
    454
  - Figure 146. Master Receiver Timing Diagram
    456
  - Figure 147. Slave Transmitter Timing Diagram
    457
  - Figure 148. Slave Receiver Timing Diagram
    458
  - Conditions of Holding SCL Line
    459
  - Table 46. Conditions of Holding SCL Line
    459
  - I 2 C Timeout Function
    460
  - PDMA Interface
    460
- Register Map
  461
- Table 47. I 2 C Register Map
  461
- Register Descriptions
  462
21 Serial Peripheral Interface (SPI)

477
22 Universal Synchronous Asynchronous Receiver Transmitter (USART)

498
- Introduction
  498
- Figure 160. USART Block Diagram
  498
- Features
  499
- Function Descriptions
  500
- Register Map
  511
- Table 55. USART Register Map
  511
- Register Descriptions
  512
23 Universal Asynchronous Receiver Transmitter (UART)

526
- Introduction
  526
- Figure 171. UART Block Diagram
  526
- Features
  527
- Function Descriptions
  527
- Register Map
  530
- Register Descriptions
  530
  - UART Data Register - URDR
    530
  - Table 58. UART Register Map
    530
  - UART Control Register - URCR
    531
  - UART Interrupt Enable Register - URIER
    533
  - UART Status & Interrupt Flag Register - URSIFR
    534
  - UART Divider Latch Register - URDLR
    536
  - UART Test Register - URTSTR
    537
24 Smart Card Interface (SCI)

538
- Introduction
  538
- Figure 174. SCI Block Diagram
  538
- Features
  539
- Functional Descriptions
  539
- Register Map
  547
- Table 62. SCI Register Map
  547
- Register Descriptions
  548
  - SCI Control Register - CR
    548
  - SCI Status Register - SR
    550
  - SCI Contact Control Register - CCR
    552
  - SCI Elementary Time Unit Register - ETUR
    553
  - SCI Guard Time Register - GTR
    554
  - SCI Waiting Time Register - WTR
    555
  - SCI Interrupt Enable Register - IER
    556
  - SCI Interrupt Pending Register - IPR
    558
  - SCI Transmit Buffer - TXB
    560
  - SCI Receive Buffer - RXB
    560
  - SCI Prescaler Register - PSCR
    561
25 USB Device Controller (USB)

562
26 Peripheral Direct Memory Access (PDMA)

593
- Introduction
  593
- Features
  593
- Figure 183. PDMA Block Diagram
  593
- Functional Description
  594
  - AHB Master
    594
  - PDMA Channel
    594
  - PDMA Request Mapping
    594
  - Table 67. PDMA Channel Assignments
    595
  - Figure 184. PDMA Request Mapping Architecture
    595
  - Channel Transfer
    596
  - Channel Priority
    596
  - Figure 185. PDMA Channel Arbitration and Scheduling Example
    596
  - Transfer Request
    597
  - Address Mode
    597
  - Auto-Reload
    597
  - Table 68. PDMA Address Modes
    597
  - Transfer Interrupt
    598
- Register Map
  598
- Table 69. PDMA Register Map
  598
- Register Descriptions
  600
27 Extend Bus Interface (EBI)

610
28 Inter-IC Sound

627
29 Cyclic Redundancy Check (CRC)

649
- Introduction
  649
- Figure 217. CRC Block Diagram
  649
- Features
  650
- Function Descriptions
  650
  - CRC Computation
    650
  - Byte and Bit Reversal for CRC Computation
    650
  - CRC with PDMA
    651
- Register Map
  651
- Table 76. CRC Register Map
  651
- Figure 218. CRC Data Bit and Byte Reversal Example
  651
- Register Descriptions
  652
  - CRC Control Register - CRCCR
    652
  - CRC Seed Register - CRCSDR
    653

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HOLTEK HT32F52342 32-bit microcontroller Manuals

HOLTEK HT32F52342 User Manual (656 pages)

Table of Contents

1 Introduction

2 Document Conventions

3 System Architecture

4 Flash Memory Controller (FMC)

5 Power Control Unit (PWRCU)

6 Clock Control Unit (CKCU)

7 Reset Control Unit (RSTCU)

8 General Purpose I/O (GPIO)

9 Alternate Function Input/Output Control Unit (AFIO)

10 Nested Vectored Interrupt Controller (NVIC)

11 External Interrupt/Event Controller (EXTI)

12 Analog to Digital Converter (ADC)

13 Comparator (CMP)

14 General-Purpose Timer (GPTM)

15 Basic Function Timer (BFTM)

16 Motor Control Timer (MCTM)

17 Single-Channel Timer (SCTM)

18 Real Time Clock (RTC)

19 Watchdog Timer (WDT)

20 Inter-Integrated Circuit (I C)

21 Serial Peripheral Interface (SPI)

22 Universal Synchronous Asynchronous Receiver Transmitter (USART)

23 Universal Asynchronous Receiver Transmitter (UART)

24 Smart Card Interface (SCI)

25 USB Device Controller (USB)

26 Peripheral Direct Memory Access (PDMA)

27 Extend Bus Interface (EBI)

28 Inter-IC Sound

29 Cyclic Redundancy Check (CRC)

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