Output Stage; Figure 111. Ti0 Digital Filter Diagram With N = 2; Figure 112. Output Stage Block Diagram - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Digital Filter (N=2)
TI0
f
SYSTEM

Figure 111. TI0 Digital Filter Diagram with N = 2

Output Stage

The MCTM supports complementary outputs for channels 0, 1 and 2 with dead time insertion. The
MCTM channel 3 output function is almost the same as that of GPTM channel 3 except for the
break function.
The channel outputs, CHxO and CHxNO, are referenced to the CHxOREF signal. These channel
outputs generate a wide variety of wide waveforms according to the configuration values of
corresponding control bits, as shown by the dashed box in the diagram.
CNTR
Output Mode
CHxCCR
Controller
x = 0 ~ 2
f
CLKIN
CHxOM
BKP
Delay
MT_BRK
line
f
sample

Figure 112. Output Stage Block Diagram

Rev. 1.00
D Q D Q D Q
CK CK CK
f
sampling
0
CHxO_DT
DTG
CHxNO_DT
f
DTS
CHDTG
CHxNE
CNTR
Output Mode
CH3CCR
Controller
f
CLKIN
CH3OM
BKF BKE
CKFAIL
Filter
311 of 486
No Filtered
x0
Output Enable
01
Controller
11
CHxE
CHxP
CHOSSI
0x
CHxOIS
10
Output Enable
11
Controller
CHxE CHxNP
CHxNE
CHOSSI
CHxOISN
Output Enable
Controller
CH3E
CH3P
CH3OIS
BRKG BRKIF
BRKIE
J Q
Filtered
CK
K
CHxO
CHMOE
x = 0 ~ 2
CHOSSR
CHxNO
CHMOE
CHOSSR
CHxOREF
CHxCMP Event
CH3O
CHMOE
CH3OCREF
CH3CMP Event
Break Event
(BEV)
Break Interrupt
(NVIC)
July 31, 2018