32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
Pause Mode
In the Pause Mode, the selected STI input signal level is used to control the counter start/stop
operation. The counter starts to count when the selected STI signal is at a high level and stops
counting when the STI signal is changed to a low level. When the counter stops, it will maintain its
present value and not be reset. Since the Pause function depends upon the STI level to control the
counter stop/start operation, the selected STI trigger signal can not be derived from the TI0BED
signal.
STI source signal
STI source signal
Figure 102. MCTM in Pause Mode
Trigger Mode
After the counter is disabled to count, the counter can resume counting when an STI rising edge
signal occurs. When an STI rising edge occurs, the counter will start to count from the current
value in the counter. Note that if the STI signal is selected to be sourced from the UEV1G bit
software trigger, the counter will not resume counting. When software triggering using the UEV1G
bit is selected as the STI source signal, there will be no clock pulse generated which can be used to
make the counter resume counting. Note that the STI signal is only used to enable the counter to
resume counting and has no effect to stop counting.
Figure 103. MCTM in Trigger Mode
Rev. 1.00
(polarity=0)
(polarity=1)
Sync
STI
CK_ CNT
CNT_ EN
CNTR
27
28
TEVIF
STI source signal
(polarity=0)
STI source signal
(polarity=1)
STI
Sync
CK_CNT
CNT_EN
CNTR
27
(Up-counting)
TEVIF
306 of 486
Sync
29
30
Software clearing
28
29
30
31
Software clearing
31
32
July 31, 2018
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