32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
Channel Controller
The GPTM has four independent channels which can be used as capture inputs or compare match
outputs. Each capture input or compare match output channel is composed of a preload register
and a shadow register. Data access of the APB bus is always implemented by reading / writing the
preload register.
When used in the input capture mode, the counter value is captured into the CHxCCR shadow
register first and then transferred into the CHxCCR preload register when the capture event occurs.
When used in the compare match output mode, the contents of the CHxCCR preload register is
copied into the associated shadow register, the counter value is then compared with the register
value.
CHxPSC
Capture
Controller
Read CHxCCR
CHxCCS
CHxCCG
CHxE
Figure 42. Capture / Compare Block Diagram
Rev. 1.00
APB Bus Interface
CHxCCR
(Preload Register)
Capture Transfer
CHxCCR
(Shadow Register)
Capture
194 of 486
Compare
Compare Transfer
Controller
CHxCCS
CHxPRE
CHxCCR
TM_CNT
Write CHxCCR
Update Event
July 31, 2018
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