32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
Port C Output Set / Reset Control Register – PCSRR
This register is used to set or reset the corresponding bit of the GPIO Port C output data.
Offset:
0x024
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
WO
0 WO
15
Type/Reset
7
Type/Reset
WO
0 WO
Bits
Field
[23:16]
PCRSTn
[7:0]
PCSETn
Rev. 1.00
30
29
28
22
21
20
0 WO
0 WO
14
13
12
6
5
4
0 WO
0 WO
Descriptions
GPIO Port C pin n Output Reset Control Bits (n = 0 ~ 7)
0: No effect on the PCDOUTn bit
1: Reset the PCDOUTn bit
Note that when the PCRSTn bit in this register or (and) the PCRSTn bit in the PCRR
register is enabled, the reset function on the PCDOUTn bit will take effect.
GPIO Port C pin n Output Set Control Bits (n = 0 ~ 7)
0: No effect on the PCDOUTn bit
1: Set the PCDOUTn bit
Note that the function enabled by the PCSETn bit has the higher priority if both the
PCSETn and PCRSTn bits are set at the same time.
137 of 486
27
26
Reserved
19
18
PCRST
0 WO
0 WO
0 WO
11
10
Reserved
3
2
PCSET
0 WO
0 WO
0 WO
25
24
17
16
0 WO
0
9
8
1
0
0 WO
0
July 31, 2018
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