Dma Tx Buffer Descriptor Pointer Register - Samsung S3C2500B User Manual

S3C2500B
31
First byte

8.7.11 DMA TX BUFFER DESCRIPTOR POINTER REGISTER

The DMA transmit buffer descriptor pointer register contains the address of the Tx buffer data pointer on the data
to be sent. During a DMA operation, the buffer descriptor pointer is updated by the next buffer data pointer.
Registers
0×F0100038
HDMATXPTRA
0×F0110038
HDMATXPTRB
0×F0120038
HDMATXPTRC
31 30 29 28 27
24 23
Second byte
Station address byte register and MASK register
[31:24] First address byte
[23:16] Second address byte
[15:8] Third address byte
[7:0] Fourth address byte
Figure 8-22. HDLC Station Address and HMASK Register
Table 8-19. DMA Tx Buffer Descriptor Pointer Registers
Address R/W
R/W
R/W
R/W
26 25
[25:0] DMA Tx buffer descriptor pointer
Figure 8-23. DMA Tx Buffer Descriptor Pointer
16 15
Third byte
Description
DMA Tx Buffer Descriptor Pointer
DMA Tx Buffer Descriptor Pointer
DMA Tx Buffer Descriptor Pointer
DMA Tx Buffer Descriptor Pointer
HDLC CONTROLLER
8 7
Fourth byte
Reset Value
0xFFFFFFFF
0xFFFFFFFF
0xFFFFFFFF
0
0
8-49