Iom2 Bus - Samsung S3C2500B User Manual

IOM2 CONTROLLER

9.3 IOM2 BUS

The IOM2 bus provides a symmetrical full-duplex communication link, containing user data,
control/programming, and status channels. Both the line card and terminal portions of the IOM2 standard utilize
the same basic frame and clocking structure, but differ in the number and usage of the individual channels. The
various channels are time-multiplexed over a four-wire serial interface. Data is clocked by a Data Rate
Clock(DCL) that operates at twice the data rate. Frames are delimited by an 8-kHz Frame Synchronization
Clock(FSC). Data is carried over Data Upstream(DU) and Data Downstream(DD) signals. Three additional
signals are specified in the terminal mode to facilitate connecting components that do not directly support IOM2.
These are a 1x-Bit rate Clock (BCL), and two Serial Data Strobes that identify the location of the B channels
(SDS1 and SDS2). The S3C2500B includes two optional signals, BCL and SDS1. SDS1 is called STRB in
S3C2500B. In S3C2500B, the terminal mode operation is supported but line-card mode is not supported.
Figure9-1 shows the IOM2 channel structure in terminal mode.
FSC
DCL
DU B1
DD B1
BCL
STRB
DU, DD 768 kbit/s (DU = data upstream = output, DD = data downstream = input)
DCL 1536 kHz input (Double Data Rate)
FSC 8 kHz input
BCL 768 kHz output
STRB strobe signal for non-IOM2 device
9-2
B2 MON0 D CI0 IC1
MR MX
B2 MON0 D CI0 IC1
MR MX
Figure 9-1. IOM2 Channel Structure in Terminal
IC2 MON1 CI1
MR MX
IC2 MON1
CI1
MR MX
S3C2500B
BAC TAD
S/G A/B