Samsung S3C2500B User Manual page 57

S3C2500B
Group Pin Name
Ethernet TX_ERR_1/
Controller1 PCOMP_10M
(18)
CRS_1
Table 1-1. S3C2500B Signal Descriptions (Continue)
Pin Type Pad Type
1 O
1 I
phob4 Transmit Error/Packet Compression Enable
for 10M.
TX_ERR is driven synchronously to TX_CLK
and sampled continuously by the Physical
Layer Entity, PHY. If asserted for one or more
TX_CLK periods, TX_ERR causes the PHY to
emit one or more symbols which are not part
of the valid data, or delimiter set located
somewhere in the frame that is being
transmitted. PCOMP_10M is asserted
immediately after the packet's DA field is
received. PCOMP_10M is used with the
Management Bus of the DP83950 Repeater
Interface Controller (from National
Semiconductor). The MAC can be
programmed to assert PCOMP if there is a
CAM match, or if there is not a match. The
RIC (Repeater Interface Controller) uses this
signal to compress (shorten) the packet
received for management purposes and to
reduce memory usage. (See the DP83950
Data Sheet, published by National
Semiconductor, for details on the RIC
Management Bus.) This pin is controlled by a
special register, with which you can define the
polarity and assertion method (CAM match
active or not match active) of the PCOMP
signal.
phis Carrier Sense/Carrier Sense for 10M.
CRS is asserted asynchronously with
minimum delay from the detection of a non-
idle medium in MII mode. CRS_10M is
asserted when a 10M-bit/s PHY has data to
transfer. A 10M-bit/s transmission also uses
this signal.
PRODUCT OVERVIEW
Description
1-23