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3.10 Halfword and Signed Data Transfer (LDRH/STRH/LDRSB/LDRSH).................................................3-34
3.10.1 Offsets and Auto-Indexing ....................................................................................................3-35
3.10.2 Half-Word Load and Stores ..................................................................................................3-36
3.10.3 Signed Byte and Half-Word Loads ........................................................................................3-36
3.10.4 Endianness and Byte/Half-Word Selection............................................................................3-36
3.10.5 Use of R15 ...........................................................................................................................3-37
3.10.6 Data Aborts...........................................................................................................................3-37
3.10.7 Instruction Cycle Times ........................................................................................................3-37
3.10.8 Assembler Syntax.................................................................................................................3-38
3.11 Block Data Transfer (LDM, STM) .....................................................................................................3-40
3.11.1 The Register List...................................................................................................................3-40
3.11.2 Addressing Modes ................................................................................................................3-41
3.11.3 Address Alignment................................................................................................................3-41
3.11.4 Use of the S Bit ....................................................................................................................3-43
3.11.5 Use of R15 as the Base ........................................................................................................3-43
3.11.6 Inclusion of the Base in the Register List...............................................................................3-44
3.11.7 Data Aborts...........................................................................................................................3-44
3.11.8 Instruction Cycle Times ........................................................................................................3-44
3.11.9 Assembler Syntax.................................................................................................................3-45
3.12 Single Data Swap (SWP) .................................................................................................................3-47
3.12.1 Bytes and Words ..................................................................................................................3-47
3.12.2 Use of R15 ...........................................................................................................................3-47
3.12.3 Data Aborts...........................................................................................................................3-48
3.12.4 Instruction Cycle Times ........................................................................................................3-48
3.12.5 Assembler Syntax.................................................................................................................3-48
3.13 Software Interrupt (SWI) ..................................................................................................................3-49
3.13.1 Return from the Supervisor...................................................................................................3-49
3.13.2 Comment Field .....................................................................................................................3-49
3.13.3 Instruction Cycle Times ........................................................................................................3-49
3.13.4 Assembler Syntax.................................................................................................................3-50
3.14 Coprocessor Data Operations (CDP)................................................................................................3-51
3.14.1 Coprocessor Instructions.......................................................................................................3-51
3.14.2 The Coprocessor Fields ........................................................................................................3-51
3.14.3 Instruction Cycle Times ........................................................................................................3-52
3.14.4 Assembler Syntax.................................................................................................................3-52
3.15 Coprocessor Data Transfers (LDC, STC) .........................................................................................3-53
3.15.1 The Coprocessor Fields ........................................................................................................3-53
3.15.2 Addressing Modes ................................................................................................................3-54
3.15.3 Address Alignment................................................................................................................3-54
3.15.4 Use of R15 ...........................................................................................................................3-54
3.15.5 Data Aborts...........................................................................................................................3-54
3.15.6 Instruction Cycle Times ........................................................................................................3-54
3.15.7 Assembler Syntax.................................................................................................................3-55
S3C2500B RISC MICROCONTROLLER
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