Buffer Descriptor; Transmit Buffer Descriptor - Samsung S3C2500B User Manual

S3C2500B

8.6 BUFFER DESCRIPTOR

8.6.1 TRANSMIT BUFFER DESCRIPTOR

31 27
O
26 25 23 22
T
Tx Control Bits
[31:0] Buffer Data Pointer
[15:0] Buffer Length
Tx Control Bits
[16] Preamble (P)
0 = No Preamble
[17] TxNoCRC Mode (N)
0 = CRC mode
[18] Little-Endian Mode (E)
0 = Big-Endian
[19] Last (L)
0 = This is not the last buffer in the frame
1 = This is the last buffer int the frame
[20] Buffer Data Pointer Decrement (D)
0 = Increment
[22:21] Widget Alignment Control (WA)
00 = No invalid bytes
10 = 2 invalid bytes
Tx Status Bit
These bit may be regarded as valid when the L bit
(in Tx control bit) is set
[26] Transmission completion (T)
0 = Normal
[31]Ownership (O)
0 = CPU
Figure 8-10. Transmit Buffer Descriptor
16 15
Buffer Pointer
1 = Preamble
1 = No CRC mode
1 = Little-Endian
1 = Decrement
01 = 1 invalid bytes
11 = 3 invalid bytes
1 = One frame completed
1 = DMA
HDLC CONTROLLER
Buffer Length
0
8-21