Samsung S3C2500B User Manual page 276

MEMORY CONTROLLER
Table 5-19. Supported SDRAM Configuration of 32-bit External Bus
SDRAM SDRAM
Technology Arrangement
2M × 8
16M-bit
1M × 16
8M × 8
64M-bit
4M × 16
2M × 32
16M × 8
128M-bit
8M × 16
4M × 32
32M × 8
256M-bit
16M × 16
8M × 32
NOTE: Banks: Number of external SDRAM memory bank used.
The controller supports up to two banks.
Leaf: Internal bank of SDRAM devices.
5-40
# Banks Address Size
Row
1 11
2
1 11
2
1 12
2
1 12
2
1 11
2
1 12
2
1 12
2
1 12
2
1 13
2
1 13
2
1 13
2
Leaf Select
Col ADDR[14]
9 –
8 –
9 HADDR[22]
8 HADDR[22]
8 HADDR[22]
10 HADDR[22]
9 HADDR[22]
8 HADDR[22]
10 HADDR[22]
9 HADDR[22]
8 HADDR[22]
S3C2500B
Total
Memory Size
ADDR[13] (Byte)
HADDR[21] 8 M
16 M
HADDR[21] 4 M
8 M
HADDR[21] 32 M
64 M
HADDR[21] 16 M
32 M
HADDR[21] 8 M
16 M
HADDR[21] 64 M
128 M
HADDR[21] 32 M
64 M
HADDR[21] 16 M
32 M
HADDR[21] 128 M
256 M
HADDR[21] 64 M
128 M
HADDR[21] 32 M
64 M