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INSTRUCTION SET
3.21 FORMAT 2: ADD/SUBTRACT
15
14
13
0
0
0
3.21.1 OPERATION
These instructions allow the contents of a Lo register or a 3-bit immediate value to be added to or subtracted
from a Lo register. The THUMB assembler syntax is shown in Table 3-9.
OP
I
THUMB Assembler
0
0
ADD Rd, Rs, Rn
0
1
ADD Rd, Rs, #Offset3 ADDS Rd, Rs, #Offset3
1
0
SUB Rd, Rs, Rn
1
1
SUB Rd, Rs, #Offset3 SUBS Rd, Rs, #Offset3
3-68
12
11
10
9
1
1
1
Op
[2:0] Destination Register
[5:3] Source Register
[8:6] Register/Immediate Value
[9] Opcode
0 = ADD
1 = SUB
[10] Immediate Flag
0 = Register operand
1 = Immediate oerand
Figure 3-31. Format 2
All instructions in this group set the CPSR condition codes.
Table 3-9. Summary of Format 2 Instructions
ARM Equivalent
ADDS Rd, Rs, Rn
SUBS Rd, Rs, Rn
8
6
5
Rn/Offset3
NOTE
Add contents of Rn to contents of Rs.
Place result in Rd.
Add 3-bit immediate value to contents of Rs.
Place result in Rd.
Subtract contents of Rn from contents of Rs.
Place result in Rd.
Subtract 3-bit immediate value from contents
of Rs. Place result in Rd.
3
2
Rs
Rd
Action
S3C2500B
0
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