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PROGRAMMER' ' S MODEL
2.15.1 DATA ABORT MODEL
The base restored data abort model differs from the base updated data abort model implemented by ARM7TDMI.
The difference in the data abort model affects only a very small section of operating system code, the data abort
handler. It does not affect user code. With the base restored data abort model, when a data abort exception
occurs during the execution of a memory access instruction, the base register is always restored by the processor
hardware to the value the register contained before the instruction was executed. This removes the need for the
data abort handler to unwind any base register update which may have been specified by the aborted instruction.
The base restored data abort model significantly simplifies the software data abort handler.
2.15.2 INSTRUCTION SET EXTENSION SPACES
All ARM processors implement the undefined instruction space as one of the entry mechanisms for the undefined
instruction exception. That is, ARM instructions with opcode[27:25] = 0b011 and opcode[4] = 1 are undefined on
all ARM processors including the ARM9TDMI and ARM7TDMI.
ARM Architecture v4 and v4T also introduced a number of instruction set extension spaces to the ARM
instruction set. These are:
•
Arithmetic instruction extension space
•
Control instruction extension space
•
Coprocessor instruction extension space
•
Load/store instruction extension space.
Instructions in these spaces are undefined (they cause an undefined instruction exception). The ARM9TDMI fully
implements all the instruction set extension spaces defined in ARM Architecture v4T as undefined instructions,
allowing emulation of future instruction set additions.
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S3C2500B
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