Assembler Syntax - Samsung S3C2500B User Manual

INSTRUCTION SET

3.6.4 ASSEMBLER SYNTAX

— MRS - transfer PSR contents to a register
MRS{cond} Rd,<psr>
— MSR - transfer register contents to PSR
MSR{cond} <psr>,Rm
— MSR - transfer register contents to PSR flag bits only
MSR{cond} <psrf>,Rm
The most significant four bits of the register contents are written to the N,Z,C & V flags respectively.
— MSR - transfer immediate value to PSR flag bits only
MSR{cond} <psrf>, <#expression>
The expression should symbolise a 32 bit value of which the most significant four bits are written to the N, Z, C
and V flags respectively.
Key:
{cond}
Rd and Rm
<psr>
SPSR
<psrf>
<#expression>
Examples
In User mode the instructions behave as follows:
MSR
MSR
MSR
MRS
In privileged modes the instructions behave as follows:
MSR
MSR
MSR
MSR
MSR
MSR
MRS
3-22
Two-character condition mnemonic. See Table 3-2.
Expressions evaluating to a register number other than R15
CPSR, CPSR_all, SPSR or SPSR_all. (CPSR and CPSR_all are synonyms as are
and SPSR_all)
CPSR_flg or SPSR_flg
Where this is used, the assembler will attempt to generate a shifted immediate 8-bit
field to match the expression. If this is impossible, it will give an error.
CPSR_all,Rm
CPSR_flg,Rm
CPSR_flg,#0xA0000000
Rd,CPSR
CPSR_all,Rm
CPSR_flg,Rm
CPSR_flg,#0x50000000
SPSR_all,Rm
SPSR_flg,Rm
SPSR_flg,#0xC0000000
Rd,SPSR
; CPSR[31:28] ← Rm[31:28]
; CPSR[31:28] ← Rm[31:28]
; CPSR[31:28] ← 0xA (set N, C; clear Z, V)
; Rd[31:0] ← CPSR[31:0]
; CPSR[31:0] ← Rm[31:0]
; CPSR[31:28] ← Rm[31:28]
; CPSR[31:28] ← 0x5 (set Z, V; clear N, C)
; SPSR_<mode>[31:0] ← Rm[31:0]
; SPSR_<mode>[31:28] ← Rm[31:28]
; SPSR_<mode>[31:28] ← 0xC (set N, Z; clear C, V)
; Rd[31:0] ← SPSR_<mode>[31:0]
S3C2500B