Arm940T Cp15 Registers; Cp15 Register Map Summary - Samsung S3C2500B User Manual

S3C2500B

2.16 ARM940T CP15 REGISTERS

2.16.1 CP15 REGISTER MAP SUMMARY

The ARM940T incorporates CP15 for system control. The register map for C15 is shown in Table 2-5.
Register
0 ID code/Cache type
1 Control
2 Cacheable
3 Write buffer control
4 Reseved
5 Protection region access permissions
6 Protection region base/size control
7 Cache operations
8 Reserved
9 Cache lockdown
10:14 Reserved
15 Test
NOTE: Register locations 0, 2, 5, and 6 each provide access to more than one register. The register accessed depends
upon the value of the opcode_2 field. See the register descriptions that follow for further information.
2.16.1.1 Register 0: ID code
This is a read-only register which returns a 32-bit device ID code. The ID code register is accessed by reading
CP15 register 0 with the opcode_2 field set to any value other than 1. For example:
MRC p15, 0, rd, c0, c0,{0,2-7}; returns ID register
The contents of the ID code are shown in Table 2-6.
Register Bits
31:12 Implementor
23:16 Architecture version
15:4 Part number
3:0 Version
Table 2-5. CP15 Register Map
Function
Table 2-6. ID Code Register
Function
PROGRAMMER' ' S MODEL
Access
See note below
Read/write
See note below
Read/write
Undefined
See note below
See note below
Write only. Reads unpredictable
Undefined
Read/write
Undefined
Not accessed in normal operations
Value
0x41 (identifies ARM)
0x2
0x940
0x1
2-21