Samsung S3C2500B User Manual page 85

S3C2500B
System & User
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15 (PC)
CPSR
= banked register
ARM State General Registers and Program Counter
FIQ Supervisor
R0 R0
R1 R1
R2
R2
R3
R3
R4
R4
R5
R5
R6 R6
R7
R7
R8
R8_fiq
R9
R9_fiq
R10_fiq R10
R11
R11_fiq
R12
R12_fiq
R13_svc
R13_fiq
R14_svc
R14_fiq
R15 (PC)
R15 (PC)
ARM State Program Status Register
CPSR CPSR
SPSR_fiq SPSR_svc
Figure 2-3. Register Organization in ARM State
About IRQ
R0 R0
R1 R1
R2 R2
R3 R3
R4 R4
R5 R5
R6 R6
R7 R7
R8 R8
R9 R9
R10 R10
R11 R11
R12 R12
R13_abt R13_irq
R14_abt R14_irq
R15 (PC) R15 (PC)
CPSR CPSR
SPSR_abt SPSR_irq
PROGRAMMER' ' S MODEL
Undefined
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13_und
R14_und
R15 (PC)
CPSR
SPSR_und
2-5