Instruction Summary - Samsung S3C2500B User Manual

INSTRUCTION SET

3.1.2 INSTRUCTION SUMMARY

Mnemonic
ADC Add with carry
ADD Add
AND AND
B Branch
BIC Bit clear
BL Branch with link
BX Branch and exchange
CDP Coprocessor data processing
CMN Compare negative
CMP Compare
EOR Exclusive OR
LDC Load coprocessor from memory
LDM Load multiple registers
LDR Load register from memory
MCR Move CPU register to coprocessor register
MLA Multiply accumulate
MOV Move register or constant
MRC Move from coprocessor register to CPU register
MRS Move PSR status/flags to register
MSR Move register to PSR status/flags
MUL Multiply
MVN Move negative register
3-2
Table 3-1. The ARM Instruction Set
Instruction Action
Rd: = Rn + Op2 + Carry
Rd: = Rn + Op2
Rd: = Rn AND Op2
R15: = address
Rd: = Rn AND NOT Op2
R14: = R15, R15: = address
R15: = Rn, T bit: = Rn[0]
(coprocessor-specific)
CPSR flags: = Rn + Op2
CPSR flags: = Rn - Op2
Rd: = (Rn AND NOT Op2)
OR (op2 AND NOT Rn)
Coprocessor load
Stack manipulation (Pop)
Rd: = (address)
cRn: = rRn {<op>cRm}
Rd: = (Rm * Rs) + Rn
Rd: = Op2
Rn: = cRn {<op>cRm}
Rn: = PSR
PSR: = Rm
Rd: = Rm * Rs
Rd: = 0xFFFFFFFF EOR Op2
S3C2500B