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GDMA CONTROLLER
12.5.3 DATA TRANSFER MODES
12.5.3.1 Single Mode
A GDMA request (xGDMA_Req or an internal request) causes one byte, one half-word, or one word to be
transmitted if four-data burst mode is disabled, or four times of transfer size if four-data burst mode is enabled.
Single mode requires a GDMA request for each data transfer. The xGDMA_Req signal can be de-asserted after
checking that xGDMA_Ack has been asserted.
xGDMA_Req
xGDMA_Ack
RD/WR Cycle
12.5.3.2 Block Mode
The assertion of only one GDMA request (xGDMA_Req or an internal request) causes all of the data, as specified
by the control register settings, to be transmitted in a single operation. The GDMA transfer is completed when the
transfer counter value reaches zero. The xGDMA_Req signal can be de-asserted after checking that
xGDMA_Ack has been asserted.
xGDMA_Req
xGDMA_Ack
RD/WR Cycle
12-18
Figure 12-8. External GDMA Requests (Single Mode)
Figure 12-9. External GDMA Requests (Block Mode)
S3C2500B
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