Memory Data Structure - Samsung S3C2500B User Manual

S3C2500B HDLC CONTROLLER

8.5.7 MEMORY DATA STRUCTURE

The flow control to the HDLC controller uses two data structures to exchange control information and data.
— Transmit buffer descriptor
— Receive buffer descriptor
Each Tx DMA buffer descriptor has the following elements.
— Buffer data pointer
— Ownership bit
— Control field for transmitter
— Status field for Tx
— Transmit buffer length
Each Rx DMA buffer descriptor has the following elements.
— Buffer data pointer
— Ownership bit
— Status field for Rx
— Accumulated received buffer length for a frame
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