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S3C2500B
3.36 FORMAT 17: SOFTWARE INTERRUPT
15
14
13
1
1
0
3.36.1 OPERATION
The SWI instruction performs a software interrupt. On taking the SWI, the processor switches into ARM state and
enters Supervisor (SVC) mode.
The THUMB assembler syntax for this instruction is shown below.
THUMB Assembler
SWI Value 8
NOTE: Value 8 is used solely by the SWI handler; it is ignored by the processor.
3.36.2 INSTRUCTION CYCLE TIMES
All instructions in this format have an equivalent ARM instruction as shown in Table 3-24. The instruction cycle
times for the THUMB instruction are identical to that of the equivalent ARM instruction.
Examples
SWI 18
11
10
9
12
1
1
1
1
[7:0] Comment Field
Figure 3-46. Format 17
Table 3-24. The SWI Instruction
ARM Equivalent
SWI Value 8
Perform Software Interrupt:
Move the address of the next instruction into LR, move CPSR
to SPSR, load the SWI vector address (0x8) into the PC.
Switch to ARM state and enter SVC mode.
8
7
1
; Take the software interrupt exception.
; Enter Supervisor mode with 18 as the
; requested SWI number.
INSTRUCTION SET
Value 8
Action
0
3-93
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