Chapter 3 Instruction Set; Instruction Set Summay; Format Summary - Samsung S3C2500B User Manual

S3C2500B
3
INSTRUCTION SET

3.1 INSTRUCTION SET SUMMAY

This chapter describes the ARM instruction set and the THUMB instruction set in the ARM9TDMI core.

3.1.1 FORMAT SUMMARY

The ARM instruction set formats are shown below.
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Cond 0 0 1
Cond 0 0 0 0 0 0 A S
Cond 0 0 0 0 1 U A S
Cond 0 0 0 1 0 B 0 0
Cond 0 0 0 1 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 1
Cond 0 0 0 P U 0 W L
Cond 0 0 0 P U 1 W L
Cond 0 1 1 P U B W L
Cond 0 1 1
Cond 1 0 0 P U S W L
Cond 1 0 1 L
Cond 1 1 0 P U N W L
Cond 1 1 1 0
Cond 1 1 1 0
Cond 1 1 1 1
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Some instruction codes are not defined but do not cause the Undefined instruction trap to be taken, for
instance a Multiply instruction with bit 6 changed to a 1. These instructions should not be used, as their
action may change in future ARM implementations.
Opcode S Rn
Rd
RdHi
Rn
Rn
Rn
Rn
Rn
Rn
CP Opc CRn
CP Opc L CRn
Figure 3-1. ARM Instruction Set Format
Rd Operand2
Rn Rs 1 0 0 1
RnLo Rn 1 0 0 1
Rd 0 0 0 0 1 0 0 1
Rd 0 0 0 0 1 S H 1
Rd Offset 1 S H 1
Rd Offset
Register List
Offset
CRd CP#
CRd CP# CP#
Rd CP# CP#
Ignored by processor
NOTE
INSTRUCTION SET
Data processing/
PSR Transfer
Rm Multiply
Rm Multiply Long
Rm Single data swap
Rn Branch and exchange
Halfword data transfer:
Rm
register offset
Halfword data transfer:
Offset
immediate offset
Single data transfer
1 Undefined
Block data transfer
Branch
Coprocessor data
Offset
transfer
Coprocessor data
0 CRm
Operation
Coprocessor register
1 CRm
Transfer
Software Interrupt
3-1