Hdlc Transmitter Operation - Samsung S3C2500B User Manual

HDLC CONTROLLER

8.5.4 HDLC TRANSMITTER OPERATION

The HTxFIFO register cannot be pre-loaded when the transmitter is disabled. After the HDLC Tx is enabled, the
flag or mark idle control bit (TxFLAG in HCON) is used to select either the mark idle state (inactive idle) or the
flag 'time fill' (active idle) state. This active or inactive idle state will continue until data is loaded into the
HTxFIFO.
The content of the HPRMB register can be sent out by setting the TxPRMB in HCON for the remote DPLL before
the data is loaded into the HTxFIFO. The length of preamble to be transmitted is determined by TxPL bits in
HMODE.
The availability of data in the HTxFIFO is indicated by the HTxFIFO available bit (TxFA in HSTAT) under the
control of the 4-word transfer mode bit (Tx4WD in HCON).
When you select 1-word transfer mode (not 4-word select mode), one word can be loaded into the HTxFIFO
(assuming the TxFA bit is set to '1'). When you select 4-word transfer mode, four successive words can be
transferred to the FIFO if the TxFA bit is set to '1'.
The nCTS (clear-to-send) input, nRTS (request-to-send), and nDCD (data-carrier-detect) are provided for a
modem or other hardware peripheral interface.
In auto enable mode, nDCD becomes the receiver enable. However, the receiver enable bit must be set before
the nDCD pin is used in this manner.
The TxFC status bit (in HSTAT) can cause an interrupt to be generated upon frame completion (This bit is set
when there is no data in HTxFIFO and when the closing flag or an abort is transmitted).
You can use Transmitter Interrupt mode or Transmitter DMA mode for transmitting the frame.
Transmitter Interrupt mode writes tx data to TxFIFO by CPU. Transmitter DMA mode writes tx data to
TxFIFO by HDMA.
If you use Transmitter Interrupt mode, then you must set the Preamble, TxNoCRC, Little-Endian mode to
HCON[23], HCON[26], and HMODE[5]. If you use Transmitter DMA mode, then you must set the
Preamble, TxNoCRC, Little-Endian mode to Transmit Buffer Descriptor.
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NOTE
S3C2500B