Samsung S3C2500B User Manual page 329

S3C2500B
7.4.1.7 BDMA/MAC Transmit Interrupt Enable Register
Registers Address
BMTXINTENA 0xF00A0018
BMTXINTENB 0xF00C0018
Table 7-17. BDMA/MAC Transmit Interrupt Enable Register Description
Bit Number
[0] Enable MAC Tx excessive
collision (ExCollIE)
[1] Enable MAC Tx underflow
(UnderflowIE)
[2] Enable MAC Tx deferral
(DeferErrIE)
[3] Enable MAC Tx no carrier
(NoCarrIE)
[4] Enable MAC Tx late
collision (LateCollIE)
[5] Enable MAC Tx transmit
parity (TxParErrIE)
[6] Enable MAC Tx completion
(TxCompIE)
[15:7] Reserved
[16] Tx complete to send control
frame interrupt enable
(TxCFcompIE)
[17] BDMA Tx not owner
interrupt enable (BTxNOIE)
[18] BDMA Tx Buffer empty
interrupt enable
(BTxEmptyIE)
[31:19] Reserved
Table 7-16. BMTXINTEN Register
R/W
R/W
R/W
Bit Name
This bit enables ExColl Interrupt.
This bit enables Underflow interrupt.
This bit enables DeferErr interrupt.
This bit enables NoCarr interrupt.
This bit enables LateColl interrupt.
This bit enables TxParErr interrupt.
This bit enables TxComp interrupt.
Not applicable.
This bit enable TxCFcomp interrupt.
This bit enables BTxNO interrupt.
This bit enables BTxEmpty interrupt
Not applicable.
Description
BDMA/MAC Tx Interrupt Enable
BDMA/MAC Tx Interrupt Enable
Description
ETHERNET CONTROLLER
Reset Value
0x00000000
0x00000000
7-19