Samsung S3C2500B User Manual page 335

S3C2500B
7.4.2.2 MAC Control Register
The MAC control register provides global control and status information for the MAC. The MLINK10 bit is a status
bit. All other bits are MAC control bits.
MAC control register settings affect both transmission and reception.
After a reset is complete, the MAC controller clears the reset bit. Not all PHYs support full-duplex operation.
(Setting the MAC loopback bit overrides the full-duplex bit.) Also, some 10M-b/s PHYs may interpret the loop 10
bit to control different functions, and manipulate the link10 bit to indicate a different status condition.
Registers Address
MACCONA 0xF00B0000
MACCONB 0xF00D0000
Bit Number
[0] Halt request (MHaltReq)
[1] Halt immediate (MHaltImm)
[2] Software reset (MReset)
[3] Full-duplex
[4] MAC loopback (MLoopBack)
[5] Reserved
[6] MII-OFF
[7] Loop 10 Mb/s (MLOOP10)
[11:8] Reserved
[12] MDC-OFF
[14:13] Reserved
[15] Link status 10 Mb/s
(MLINK10), read-only
[31:16] Reserved
Table 7-28. MACCON Register
R/W
R/W
R/W
Table 7-29. MAC Control Register Description
Bit Name
Set this bit to stop data frame transmission and reception as
soon as Tx/Rx of any current frames has been completed.
Set this bit to immediately stop all transmission and reception.
Set this bit to reset all MAC control and status register and
MAC state machines. This bit is automatically cleared.
If the PHY chip advertising full-duplex, set this bit. In this case,
collision does not detected.
Set this bit to cause transmission signals to be presented as
input to the receive circuit without leaving the controller.
Not applicable
Use this bit to select the connection mode. If this bit is set to
one, 10M-bits/s interface will select the 10M-bits/s endec.
Otherwise, the MII will be selected.
If this bit is set, the Loop_10 external signal is asserted to the
10M-b/s endec.
Not applicable.
Clear this bit to enable the MDC clock generation for power
management. If it is set to one, the MDC clock generation is
disabled.
Not applicable.
This bit value is read as a buffered signal on the link 10 pin.
Not applicable.
ETHERNET CONTROLLER
Description
MAC control
MAC control
Description
Reset Value
0x00000000
0x00000000
7-25