Basic Operation - Samsung S3C2500B User Manual

MEMORY CONTROLLER S3C2500B

5.7.8 BASIC OPERATION

SDRAM initialization sequence
On power-on reset, software must initialize the SDRAM controller and each of the SDRAM connected to the
controller. Refer to the SDRAM data sheet for more detailed information on the start up procedure for the
SDRAM used. Typical example sequence is given below :
1. Wait 200us to allow SDRAM power and clocks to stabilize.
2. Program the INIT[1:0] of the CMDREG to 01. This automatically issues a PALL command to the SDRAM.
3. Write 0xF into the refresh timer register. This provides a refresh cycle every 15 clock cycles.
4. Wait for a time period equivalent to 120 clock cycles (8 refresh cycles).
5. Program the normal operational value into the refresh timer.
6. Program the CFGREG to their normal operation values.
7. Program the INIT[1:0] to 10. This automatically issues a MRS command to the SDRAM.
8. Program the INIT[1:0] to 00. The controller enters the normal mode.
9. Program the CMDREG and WBTOREG to their normal operation values.
10. The SDRAM is now ready for normal operation.
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