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PROGRAMMER' ' S MODEL
Each register contains the access permission bits, apn[1:0], for the eight areas of instruction or data memory, as
shown in Table 2-12.
All defined bits in the control register are set to zero at reset.
Register Bits
15:14
13:12
11:10
9:8
7:6
5:4
3:2
1:0
The values of the Iapn[1:0] and Dapn[1:0] bits define the access permission for each area of memory.
The encoding is shown in Table 2-13.
On reset, the values of the Iapn[1:0] and Dapn[1:0] bits for all areas are undefined. However, as on reset,
the protection unit is disabled and all areas are effectively set to no access. The protection space
registers therefore, must be programmed before the protection unit is enabled.
00
01
10
11
2-26
Table 2-12. Protection Space Register Format
ap7[1:0] bits of area 7
ap6[1:0] bits of area 6
ap5[1:0] bits of area 5
ap4[1:0] bits of area 4
ap3[1:0] bits of area 3
ap2[1:0] bits of area 2
ap1[1:0] bits of area 1
ap0[1:0] bits of area 0
Table 2-13. Permission Encoding
I/Dapn[1:0]
No access.
Privileged mode access only.
Privileged mode full access, user mode read only.
Full access.
Functions
NOTE
Permission
S3C2500B
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