Samsung S3C2500B User Manual page 346

ETHERNET CONTROLLER
7.4.2.14 Content Addressable Memory (CAM) Register
There are 21 CAM entries for the destination address and the pause control frame. For the destination address
CAM value, one destination address consists of 6 bytes. Using the 32-word space (32 × 4 bytes), you can
therefore maintain up to 21 separate destination addresses.
You use CAM entries 0, 1, and 18 to send pause control frames. To send a pause control frame, you write the
CAM0 entry with the destination address, the CAM1 entry with the source address, and the CAM 18 entry with
length/type, opcode, and operand. You then set the send pause bit in the MAC transmit control register.
Registers
CAMA 0xF00B0080-
0xF00B00FC
CAMB 0xF00D0080-
0xF00D00FC
Table 7-55. Content Address Memory (CAM) Register Description
Bit Number
[31:0]
7-36
Table 7-52. CAM Register
Address R/W
R/W
R/W
Bit Name
CAM content
Description
CAM content (32-word)
CAM content (32-word)
The CPU uses the CAM content register as data for
destination address. To activate the CAM function, you must
set the appropriate enable bits in CAM enable register.
Description
S3C2500B
Reset Value
Undefined
Undefined