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S3C2500B
3.27 FORMAT 8: LOAD/STORE SIGN-EXTENDED BYTE/HALF-WORD
15
14
13
0
1
0
3.27.1 OPERATION
These instructions load optionally sign-extended bytes or half-words, and store half-words. The THUMB
assembler syntax is shown below.
L
B
THUMB Assembler
0
0 STRH Rd, [Rb, Ro]
0
1 LDRH Rd, [Rb, Ro]
1
0 LDSB Rd, [Rb, Ro]
1
1 LDSH Rd, [Rb, Ro]
11
10
9
12
1
H
S
1
[2:0] Destination Register
[5:3] Base Register
[8:6] Offset Register
[10] Sign-Extended Flag
0 = Operand not sing-extended
1 = Operand sing-extended
[11] H Flag
Figure 3-37. Format 8
Table 3-15. Summary of format 8 instructions
ARM Equivalent
STRH Rd, [Rb, Ro]
LDRH Rd, [Rb, Ro]
LDRSB Rd, [Rb, Ro] Load sign-extended byte:
LDRSH Rd, [Rb, Ro] Load sign-extended half-word:
8
6
5
Ro
Store half-word:
Add Ro to base address in Rb. Store bits 0–15 of Rd at
the resulting address.
Load half-word:
Add Ro to base address in Rb. Load bits 0–15 of Rd from
the resulting address, and set bits 16-31 of Rd to 0.
Add Ro to base address in Rb. Load bits 0–7 of Rd from
the resulting address, and set bits 8-31 of Rd to bit 7.
Add Ro to base address in Rb. Load bits 0–15 of Rd from
the resulting address, and set bits 16-31 of Rd to bit 15.
INSTRUCTION SET
3
2
Rb
Rd
Action
0
3-79
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