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MEMORY CONTROLLER
HCLKO
CKE
nSDCS
nSDRAS
nSDCAS
tADDRd
ADDR
DATA
nSDWE
DQM/
nWBE
5-58
tCH
tCL
tCC
tRCD
tCSd
tCSh
tRASd
tRASh
Row Addr.
tDQMd
Row Active
Figure 5-31. Burst Read Operation (CAS Latency = 3)
tCASd
tADDRh
tCASh
tRDd
Data
CAS Latency
DQM Latency
Write
Col. Addr.
Data
Data
Data
tDQMh
S3C2500B
tRDh
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