High-Speed Uart Interrupt Enable Register - Samsung S3C2500B User Manual

SERIAL I/O (HIGH-SPEED UART)

14.3.3 HIGH-SPEED UART INTERRUPT ENABLE REGISTER

Registers Offset Address
HUINT 0xF0070008
0xF0080008
Table 14-8. High-Speed UART Interrupt Enable Register Description
Bit Number
[0] RDVIE
[1] BKDIE
[2] FERIE
[3] PERIE
[4] OERIE
[5] CCDIE
[6] DCDLIE
[7] RFREAIE
[9:8] Reserved
[10] OVFFIE
[11] Reserved
[12] E_RxTOIE
[13] AUBDDNIE
[15:14] Reserved
[16] E_CTSIE
[17] TIIE
[18] THEIE
[31:19] Reserved
14-14
Table 14-7. HUCON Interrupt Enable Registers
R/W
R/W High-Speed UART Interrupt Enable register
Bit Name
Receive Data Valid interrupt enable
Break Signal Detected interrupt enable
Frame Error interrupt enable
Parity Error interrupt enable
Overrun Error interrupt enable
Control Character Detect interrupt enable
DCD High at receiver checking time interrupt enable
Receive FIFO Data trigger level reach interrupt enable
Receive FIFO overrun interrupt enable
Receive Event time out interrupt enable
AutoBaud Rate Detection done interrupt enable
CTS Event occurred interrupt enable
Transmitter Idle interrupt enable
Transmit Holding Register Empty interrupt enable
Description
Description
S3C2500B
Reset Value
0x00