INSTRUCTION SET
3.34 FORMAT 15: MULTIPLE LOAD/STORE
15
14
13
1
1
0
3.34.1 OPERATION
These instructions allow multiple loading and storing of Lo registers. The THUMB assembler syntax is shown in
the following table.
L
THUMB Assembler
0
STMIA Rb!, { Rlist }
1
LDMIA Rb!, { Rlist }
3.34.2 INSTRUCTION CYCLE TIMES
All instructions in this format have an equivalent ARM instruction as shown in Table 3-22. The instruction cycle
times for the THUMB instruction are identical to that of the equivalent ARM instruction.
Examples
STMIA
3-90
11
10
12
0
L
Rb
[7:0] Register List
[10:8] Base Register
[11] Load/Store Bit
0 = Store to memory
1 = Load from memory
Figure 3-44. Format 15
Table 3-22. The Multiple Load/Store Instructions
ARM Equivalent
STMIA Rb!, { Rlist }
LDMIA Rb!, { Rlist }
R0!, {R3-R7}
8
7
Store the registers specified by Rlist, starting at the base
address in Rb. Write back the new base address.
Load the registers specified by Rlist, starting at the base
address in Rb. Write back the new base address.
; Store the contents of registers R3-R7
; starting at the address specified in
; R0, incrementing the addresses for each word.
; Write back the updated value of R0.
0
Rlist
Action
S3C2500B