Gdma Run Enable Registers - Samsung S3C2500B User Manual

GDMA CONTROLLER

12.3.5 GDMA RUN ENABLE REGISTERS

The GDMA run enable register (DRER) can enable or disable the RUN ENABLE bit, DCON[0] of the GDMA
control register (DCON). The DRER register is write-only register.
Registers Address
DRER0 0xF0050010
DRER1 0xF0050030
DRER2 0xF0050050
DRER3 0xF0050070
DRER4 0xF0050090
DRER5 0xF00500B0
31
12-14
Table 12-7. DRER0/1/2/3/4/5 Registers
R/W
W GDMA channel 0 run enable register
W GDMA channel 1 run enable register
W GDMA channel 2 run enable register
W GDMA channel 3 run enable register
W GDMA channel 4 run enable register
W GDMA channel 5 run enable register
Reserved
[0] Run Enable
Figure 12-6. GDMA Run Enable Register
Description
S3C2500B
Reset Value
0xXXXXXXX0
0xXXXXXXX0
0xXXXXXXX0
0xXXXXXXX0
0xXXXXXXX0
0xXXXXXXX0
1 0
R
E