STMicroelectronics STM32F405 Reference Manual page 1230

Ethernet (ETH): media access control (MAC) with DMA controller
Table 194. Ethernet register map and reset values (continued)
Offset Register
ETH_
0x2C
MACPMTCSR
Reset value 0
ETH_
MACDBGR
0x34
Reset value
ETH_MACSR
0x38
Reset value
ETH_MACIMR
0x3C
Reset value
ETH_MACA0HR
0x40
Reset value 1
ETH_MACA0LR
0x44
Reset value 1
ETH_MACA1HR
0x48
Reset value 0
ETH_MACA1LR
0x4C
Reset value 1
ETH_MACA2HR
0x50
Reset value 0
ETH_MACA2LR
0x54
Reset value 1
ETH_MACA3HR
0x58
Reset value 0
ETH_MACA3LR
0x5C
Reset value 1
ETH_MMCCR
0x100
Reset value
ETH_MMCRIR
0x104
Reset value
ETH_MMCTIR
0x108
Reset value
ETH_MMCRIMR
0x10C
Reset value
1230/1731
0 0 0
Reserved
0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1
MBC[6:0]
0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1
MBC
0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1
MBC
0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1
Reserved
Reserved
Reserved
DocID018909 Rev 11
Reserved
Reserved
0 0 0 0 0 0
Reserved
Reserved
0 0 0 0 0 0 1 1
MACA0L
1 1 1 1 1 1 1 1
Reserved
1 1
MACA1L
1 1 1 1 1 1 1 1
Reserved
1 1
MACA2L
1 1 1 1 1 1 1 1
Reserved
1 1
MACA3L
1 1 1 1 1 1 1 1
Reserved
0
Reserved
0 0 0
0
0 0
0 0 0
0 0
Reserved
0
MACA0H
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
MACA1H
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
MACA2H
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
MACA3H
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
Reserved
0
Reserved
Reserved
0
RM0090
0 0 0 0
0 0 0 0 0
Reserve
d
0 0 0
Reserve
d
0
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
1 1 1 1 1 1
0 0 0 0 0 0
Reserved
0
Reserved
0